76 lines
1.9 KiB
YAML
76 lines
1.9 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||
|
|
%YAML 1.2
|
||
|
|
---
|
||
|
|
$id: http://devicetree.org/schemas/clock/qcom,x1e80100-camcc.yaml#
|
||
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
|
||
|
|
title: Qualcomm Camera Clock & Reset Controller on x1e80100
|
||
|
|
|
||
|
|
maintainers:
|
||
|
|
- Bryan O'Donoghue <bryan.odonoghue@linaro.org>
|
||
|
|
|
||
|
|
description: |
|
||
|
|
Qualcomm camera clock control module provides the clocks, resets and power
|
||
|
|
domains on x1e80100.
|
||
|
|
|
||
|
|
See also:
|
||
|
|
include/dt-bindings/clock/qcom,x1e80100-camcc.h
|
||
|
|
|
||
|
|
allOf:
|
||
|
|
- $ref: qcom,gcc.yaml#
|
||
|
|
|
||
|
|
properties:
|
||
|
|
compatible:
|
||
|
|
enum:
|
||
|
|
- qcom,x1e80100-camcc
|
||
|
|
|
||
|
|
reg:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
clocks:
|
||
|
|
items:
|
||
|
|
- description: Camera AHB clock from GCC
|
||
|
|
- description: Board XO source
|
||
|
|
- description: Board active XO source
|
||
|
|
- description: Sleep clock source
|
||
|
|
|
||
|
|
power-domains:
|
||
|
|
items:
|
||
|
|
- description: A phandle to the MXC power-domain
|
||
|
|
- description: A phandle to the MMCX power-domain
|
||
|
|
|
||
|
|
required-opps:
|
||
|
|
items:
|
||
|
|
- description: A phandle to an OPP node describing MXC performance points
|
||
|
|
- description: A phandle to an OPP node describing MMCX performance points
|
||
|
|
|
||
|
|
required:
|
||
|
|
- compatible
|
||
|
|
- clocks
|
||
|
|
- power-domains
|
||
|
|
- required-opps
|
||
|
|
|
||
|
|
unevaluatedProperties: false
|
||
|
|
|
||
|
|
examples:
|
||
|
|
- |
|
||
|
|
#include <dt-bindings/clock/qcom,x1e80100-gcc.h>
|
||
|
|
#include <dt-bindings/clock/qcom,rpmh.h>
|
||
|
|
#include <dt-bindings/power/qcom,rpmhpd.h>
|
||
|
|
clock-controller@ade0000 {
|
||
|
|
compatible = "qcom,x1e80100-camcc";
|
||
|
|
reg = <0xade0000 0x20000>;
|
||
|
|
clocks = <&gcc GCC_CAMERA_AHB_CLK>,
|
||
|
|
<&rpmhcc RPMH_CXO_CLK>,
|
||
|
|
<&rpmhcc RPMH_CXO_CLK_A>,
|
||
|
|
<&sleep_clk>;
|
||
|
|
power-domains = <&rpmhpd RPMHPD_MXC>,
|
||
|
|
<&rpmhpd RPMHPD_MMCX>;
|
||
|
|
required-opps = <&rpmhpd_opp_low_svs>,
|
||
|
|
<&rpmhpd_opp_low_svs>;
|
||
|
|
#clock-cells = <1>;
|
||
|
|
#reset-cells = <1>;
|
||
|
|
#power-domain-cells = <1>;
|
||
|
|
};
|
||
|
|
...
|