83 lines
1.8 KiB
YAML
83 lines
1.8 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2025 Amlogic, Inc. All rights reserved
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/amlogic,a4-spifc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SPI flash controller for Amlogic ARM SoCs
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maintainers:
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- Liang Yang <liang.yang@amlogic.com>
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- Feng Chen <feng.chen@amlogic.com>
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- Xianwei Zhao <xianwei.zhao@amlogic.com>
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description:
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The Amlogic SPI flash controller is an extended version of the Amlogic NAND
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flash controller. It supports SPI Nor Flash and SPI NAND Flash(where the Host
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ECC HW engine could be enabled).
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allOf:
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- $ref: /schemas/spi/spi-controller.yaml#
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properties:
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compatible:
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const: amlogic,a4-spifc
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reg:
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maxItems: 1
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clocks:
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items:
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- description: clock apb gate
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- description: clock used for the controller
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clock-names:
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items:
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- const: gate
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- const: core
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interrupts:
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maxItems: 1
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amlogic,rx-adj:
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description:
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Number of clock cycles by which sampling is delayed.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2, 3]
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default: 0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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sfc0: spi@fe08d000 {
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compatible = "amlogic,a4-spifc";
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reg = <0xfe08d000 0x800>;
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clocks = <&clkc_periphs 31>,
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<&clkc_periphs 102>;
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clock-names = "gate", "core";
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pinctrl-0 = <&spiflash_default>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-ecc-engine = <&sfc0>;
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nand-ecc-strength = <8>;
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nand-ecc-step-size = <512>;
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};
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};
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