45 lines
989 B
C
45 lines
989 B
C
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/* SPDX-License-Identifier: MIT
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*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*/
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#include "gpu.h"
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#include <engine/ce/priv.h>
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#include <engine/fifo/priv.h>
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#include <nvif/class.h>
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const struct nvkm_rm_gpu
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gb20x_gpu = {
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.disp.class = {
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.root = GB202_DISP,
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.caps = GB202_DISP_CAPS,
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.core = GB202_DISP_CORE_CHANNEL_DMA,
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.wndw = GB202_DISP_WINDOW_CHANNEL_DMA,
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.wimm = GB202_DISP_WINDOW_IMM_CHANNEL_DMA,
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.curs = GB202_DISP_CURSOR,
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},
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.usermode.class = BLACKWELL_USERMODE_A,
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.fifo.chan = {
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.class = BLACKWELL_CHANNEL_GPFIFO_B,
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.doorbell_handle = gb202_chan_doorbell_handle,
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},
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.ce = {
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.class = BLACKWELL_DMA_COPY_B,
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.grce_mask = gb202_ce_grce_mask,
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},
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.gr.class = {
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.i2m = BLACKWELL_INLINE_TO_MEMORY_A,
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.twod = FERMI_TWOD_A,
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.threed = BLACKWELL_B,
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.compute = BLACKWELL_COMPUTE_B,
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},
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.nvdec.class = NVCFB0_VIDEO_DECODER,
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.nvenc.class = NVCFB7_VIDEO_ENCODER,
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.nvjpg.class = NVCFD1_VIDEO_NVJPG,
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.ofa.class = NVCFFA_VIDEO_OFA,
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};
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