1375 lines
40 KiB
Plaintext
1375 lines
40 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Samsung's Exynos 8895 SoC device tree source
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*
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* Copyright (c) 2024, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
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*/
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#include <dt-bindings/clock/samsung,exynos8895.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "samsung,exynos8895";
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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aliases {
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pinctrl0 = &pinctrl_alive;
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pinctrl1 = &pinctrl_abox;
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pinctrl2 = &pinctrl_vts;
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pinctrl3 = &pinctrl_fsys0;
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pinctrl4 = &pinctrl_fsys1;
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pinctrl5 = &pinctrl_busc;
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pinctrl6 = &pinctrl_peric0;
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pinctrl7 = &pinctrl_peric1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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core2 {
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cpu = <&cpu2>;
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};
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core3 {
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cpu = <&cpu3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu4>;
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};
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core1 {
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cpu = <&cpu5>;
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};
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core2 {
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cpu = <&cpu6>;
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};
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core3 {
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cpu = <&cpu7>;
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};
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};
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};
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cpu4: cpu@0 {
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device_type = "cpu";
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compatible = "samsung,mongoose-m2";
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reg = <0x0>;
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enable-method = "psci";
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};
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cpu5: cpu@1 {
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device_type = "cpu";
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compatible = "samsung,mongoose-m2";
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reg = <0x1>;
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enable-method = "psci";
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};
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cpu6: cpu@2 {
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device_type = "cpu";
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compatible = "samsung,mongoose-m2";
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reg = <0x2>;
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enable-method = "psci";
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};
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cpu7: cpu@3 {
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device_type = "cpu";
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compatible = "samsung,mongoose-m2";
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reg = <0x3>;
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enable-method = "psci";
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};
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cpu0: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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enable-method = "psci";
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};
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cpu1: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x101>;
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enable-method = "psci";
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};
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cpu2: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x102>;
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enable-method = "psci";
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};
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cpu3: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x103>;
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enable-method = "psci";
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};
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};
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oscclk: osc-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "oscclk";
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};
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pmu-a53 {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>,
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<&cpu1>,
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<&cpu2>,
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<&cpu3>;
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};
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pmu-mongoose-m2 {
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compatible = "samsung,mongoose-pmu";
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu4>,
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<&cpu5>,
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<&cpu6>,
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<&cpu7>;
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};
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psci {
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compatible = "arm,psci";
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method = "smc";
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cpu_off = <0x84000002>;
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cpu_on = <0xc4000003>;
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cpu_suspend = <0xc4000001>;
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};
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soc: soc@0 {
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compatible = "simple-bus";
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ranges = <0x0 0x0 0x0 0x20000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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chipid@10000000 {
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compatible = "samsung,exynos8895-chipid",
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"samsung,exynos850-chipid";
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reg = <0x10000000 0x24>;
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};
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cmu_peris: clock-controller@10010000 {
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compatible = "samsung,exynos8895-cmu-peris";
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reg = <0x10010000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_CMU_PERIS_BUS>;
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clock-names = "oscclk", "bus";
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};
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timer@10040000 {
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compatible = "samsung,exynos8895-mct",
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"samsung,exynos4210-mct";
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reg = <0x10040000 0x800>;
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clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>;
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clock-names = "fin_pll", "mct";
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interrupts = <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
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};
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gic: interrupt-controller@10201000 {
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compatible = "arm,gic-400";
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reg = <0x10201000 0x1000>,
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<0x10202000 0x1000>,
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<0x10204000 0x2000>,
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<0x10206000 0x2000>;
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_HIGH)>;
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#address-cells = <0>;
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#size-cells = <1>;
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};
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cmu_peric0: clock-controller@10400000 {
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compatible = "samsung,exynos8895-cmu-peric0";
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reg = <0x10400000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_UART_DBG>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_USI00>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_USI01>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_USI02>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_USI03>;
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clock-names = "oscclk", "bus", "uart", "usi0",
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"usi1", "usi2", "usi3";
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};
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syscon_peric0: syscon@10420000 {
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compatible = "samsung,exynos8895-peric0-sysreg", "syscon";
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reg = <0x10420000 0x2000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>;
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};
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serial_0: serial@10430000 {
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compatible = "samsung,exynos8895-uart";
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reg = <0x10430000 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK>;
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clock-names = "uart", "clk_uart_baud0";
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interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_bus>;
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samsung,uart-fifosize = <256>;
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status = "disabled";
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};
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usi0: usi@10440000 {
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compatible = "samsung,exynos8895-usi";
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ranges = <0x0 0x10440000 0x11000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>;
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clock-names = "pclk", "ipclk";
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#address-cells = <1>;
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#size-cells = <1>;
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samsung,sysreg = <&syscon_peric0 0x1000>;
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status = "disabled";
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hsi2c_5: i2c@0 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x0 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c5_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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serial_2: serial@0 {
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compatible = "samsung,exynos8895-uart";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>;
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clock-names = "uart", "clk_uart_baud0";
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interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&uart2_bus>;
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pinctrl-names = "default";
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samsung,uart-fifosize = <64>;
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status = "disabled";
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};
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spi_2: spi@0 {
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compatible = "samsung,exynos8895-spi",
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"samsung,exynos850-spi";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI>;
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clock-names = "spi", "spi_busclk0";
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interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&spi2_bus>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_6: i2c@10000 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x10000 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c6_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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};
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usi1: usi@10460000 {
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compatible = "samsung,exynos8895-usi";
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ranges = <0x0 0x10460000 0x11000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>;
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clock-names = "pclk", "ipclk";
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#address-cells = <1>;
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#size-cells = <1>;
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samsung,sysreg = <&syscon_peric0 0x1004>;
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status = "disabled";
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hsi2c_7: i2c@0 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x0 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c5_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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serial_3: serial@0 {
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compatible = "samsung,exynos8895-uart";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>;
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clock-names = "uart", "clk_uart_baud0";
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interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&uart3_bus>;
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pinctrl-names = "default";
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samsung,uart-fifosize = <64>;
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status = "disabled";
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};
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spi_3: spi@0 {
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compatible = "samsung,exynos8895-spi",
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"samsung,exynos850-spi";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI>;
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clock-names = "spi", "spi_busclk0";
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interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&spi3_bus>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_8: i2c@10000 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x10000 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c8_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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};
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usi2: usi@10480000 {
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compatible = "samsung,exynos8895-usi";
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ranges = <0x0 0x10480000 0x11000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>;
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clock-names = "pclk", "ipclk";
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#address-cells = <1>;
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#size-cells = <1>;
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samsung,sysreg = <&syscon_peric0 0x1008>;
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status = "disabled";
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hsi2c_9: i2c@0 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x0 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c9_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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serial_4: serial@0 {
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compatible = "samsung,exynos8895-uart";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>;
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clock-names = "uart", "clk_uart_baud0";
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interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&uart4_bus>;
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pinctrl-names = "default";
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samsung,uart-fifosize = <64>;
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status = "disabled";
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};
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spi_4: spi@0 {
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compatible = "samsung,exynos8895-spi",
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"samsung,exynos850-spi";
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reg = <0x0 0x100>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI>;
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clock-names = "spi", "spi_busclk0";
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interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&spi4_bus>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hsi2c_10: i2c@10000 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x10000 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK>;
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clock-names = "hsi2c";
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interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&hsi2c10_bus>;
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pinctrl-names = "default";
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status = "disabled";
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};
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};
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usi3: usi@104a0000 {
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compatible = "samsung,exynos8895-usi";
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ranges = <0x0 0x104a0000 0x11000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>,
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<&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>;
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clock-names = "pclk", "ipclk";
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#address-cells = <1>;
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#size-cells = <1>;
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samsung,sysreg = <&syscon_peric0 0x100c>;
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status = "disabled";
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hsi2c_11: i2c@0 {
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compatible = "samsung,exynos8895-hsi2c";
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reg = <0x0 0x1000>;
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clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>;
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|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c11_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_5: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>,
|
|
<&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart5_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_5: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>,
|
|
<&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi5_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_12: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c12_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
pinctrl_peric0: pinctrl@104d0000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x104d0000 0x1000>;
|
|
interrupts = <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
cmu_peric1: clock-controller@10800000 {
|
|
compatible = "samsung,exynos8895-cmu-peric1";
|
|
reg = <0x10800000 0x8000>;
|
|
#clock-cells = <1>;
|
|
clocks = <&oscclk>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_SPEEDY2>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM0>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM1>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_UART_BT>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI04>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI05>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI06>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI07>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI08>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI09>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI10>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI11>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI12>,
|
|
<&cmu_top CLK_DOUT_CMU_PERIC1_USI13>;
|
|
clock-names = "oscclk", "bus", "speedy", "cam0",
|
|
"cam1", "uart", "usi4", "usi5",
|
|
"usi6", "usi7", "usi8", "usi9",
|
|
"usi10", "usi11", "usi12", "usi13";
|
|
};
|
|
|
|
syscon_peric1: syscon@10820000 {
|
|
compatible = "samsung,exynos8895-peric1-sysreg", "syscon";
|
|
reg = <0x10820000 0x2000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
|
|
};
|
|
|
|
serial_1: serial@10830000 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x10830000 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_EXT_UCLK>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_bus>;
|
|
samsung,uart-fifosize = <256>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usi4: usi@10840000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10840000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1008>;
|
|
status = "disabled";
|
|
|
|
hsi2c_13: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c13_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_6: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart6_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_6: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi6_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_14: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c14_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi5: usi@10860000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10860000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x100c>;
|
|
status = "disabled";
|
|
|
|
hsi2c_15: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c15_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_7: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart7_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_7: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi7_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_16: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c16_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi6: usi@10880000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10880000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1010>;
|
|
status = "disabled";
|
|
|
|
hsi2c_17: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c17_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_8: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart8_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_8: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi8_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_18: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c18_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi7: usi@108a0000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x108a0000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1014>;
|
|
status = "disabled";
|
|
|
|
hsi2c_19: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c19_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_9: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart9_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_9: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi9_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_20: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c20_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi8: usi@108c0000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x108c0000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1018>;
|
|
status = "disabled";
|
|
|
|
hsi2c_21: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c21_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_10: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart10_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_10: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi10_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_22: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c22_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi9: usi@108e0000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x108e0000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x101c>;
|
|
status = "disabled";
|
|
|
|
hsi2c_23: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c23_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_11: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart11_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_11: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi11_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_24: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c24_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi10: usi@10900000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10900000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1020>;
|
|
status = "disabled";
|
|
|
|
hsi2c_25: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c25_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_12: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart12_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_12: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi12_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_26: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c26_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi11: usi@10920000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10920000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1024>;
|
|
status = "disabled";
|
|
|
|
hsi2c_27: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c27_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_13: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart13_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_13: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi13_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_28: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c28_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi12: usi@10940000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10940000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x1028>;
|
|
status = "disabled";
|
|
|
|
hsi2c_29: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c29_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_14: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart14_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_14: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi14_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_30: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c30_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usi13: usi@10960000 {
|
|
compatible = "samsung,exynos8895-usi";
|
|
ranges = <0x0 0x10960000 0x11000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>;
|
|
clock-names = "pclk", "ipclk";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
samsung,sysreg = <&syscon_peric1 0x102c>;
|
|
status = "disabled";
|
|
|
|
hsi2c_31: i2c@0 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x0 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c31_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
serial_15: serial@0 {
|
|
compatible = "samsung,exynos8895-uart";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>;
|
|
clock-names = "uart", "clk_uart_baud0";
|
|
interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&uart15_bus>;
|
|
pinctrl-names = "default";
|
|
samsung,uart-fifosize = <64>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_15: spi@0 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0 0x100>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi15_bus>;
|
|
pinctrl-names = "default";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_32: i2c@10000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c32_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
pinctrl_peric1: pinctrl@10980000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x10980000 0x1000>;
|
|
interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
hsi2c_1: i2c@10990000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x10990000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM0_IPCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c1_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_2: i2c@109a0000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x109a0000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM1_IPCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c2_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_3: i2c@109b0000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x109b0000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM2_IPCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c3_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
hsi2c_4: i2c@109c0000 {
|
|
compatible = "samsung,exynos8895-hsi2c";
|
|
reg = <0x109c0000 0x1000>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM3_IPCLK>;
|
|
clock-names = "hsi2c";
|
|
interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&hsi2c4_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_0: spi@109d0000 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x109d0000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi0_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_1: spi@109e0000 {
|
|
compatible = "samsung,exynos8895-spi",
|
|
"samsung,exynos850-spi";
|
|
reg = <0x109e0000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>,
|
|
<&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
|
|
pinctrl-0 = <&spi1_bus>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
cmu_fsys0: clock-controller@11000000 {
|
|
compatible = "samsung,exynos8895-cmu-fsys0";
|
|
reg = <0x11000000 0x8000>;
|
|
#clock-cells = <1>;
|
|
clocks = <&oscclk>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS0_BUS>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS0_DPGTC>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS0_MMC_EMBD>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS0_UFS_EMBD>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS0_USBDRD30>;
|
|
clock-names = "oscclk", "bus", "dpgtc", "mmc",
|
|
"ufs", "usbdrd30";
|
|
};
|
|
|
|
syscon_fsys0: syscon@11020000 {
|
|
compatible = "samsung,exynos8895-fsys0-sysreg", "syscon";
|
|
reg = <0x11020000 0x2000>;
|
|
clocks = <&cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK>;
|
|
};
|
|
|
|
pinctrl_fsys0: pinctrl@11050000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x11050000 0x1000>;
|
|
interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
cmu_fsys1: clock-controller@11400000 {
|
|
compatible = "samsung,exynos8895-cmu-fsys1";
|
|
reg = <0x11400000 0x8000>;
|
|
#clock-cells = <1>;
|
|
clocks = <&oscclk>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS1_BUS>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>,
|
|
<&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>;
|
|
clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
|
|
};
|
|
|
|
syscon_fsys1: syscon@11420000 {
|
|
compatible = "samsung,exynos8895-fsys1-sysreg", "syscon";
|
|
reg = <0x11420000 0x2000>;
|
|
clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK>;
|
|
};
|
|
|
|
pinctrl_fsys1: pinctrl@11430000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x11430000 0x1000>;
|
|
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
mmc: mmc@11500000 {
|
|
compatible = "samsung,exynos8895-dw-mshc-smu",
|
|
"samsung,exynos7-dw-mshc-smu";
|
|
reg = <0x11500000 0x2000>;
|
|
assigned-clocks = <&cmu_top CLK_MOUT_CMU_FSYS1_MMC_CARD>;
|
|
assigned-clock-parents = <&cmu_top CLK_FOUT_SHARED4_PLL>;
|
|
clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_I_ACLK>,
|
|
<&cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_SDCLKIN>;
|
|
clock-names = "biu", "ciu";
|
|
fifo-depth = <64>;
|
|
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pinctrl_abox: pinctrl@13e60000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x13e60000 0x1000>;
|
|
};
|
|
|
|
pinctrl_vts: pinctrl@14080000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x14080000 0x1000>;
|
|
};
|
|
|
|
pinctrl_busc: pinctrl@15a30000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x15a30000 0x1000>;
|
|
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
cmu_top: clock-controller@15a80000 {
|
|
compatible = "samsung,exynos8895-cmu-top";
|
|
reg = <0x15a80000 0x8000>;
|
|
#clock-cells = <1>;
|
|
clocks = <&oscclk>;
|
|
clock-names = "oscclk";
|
|
};
|
|
|
|
pmu_system_controller: system-controller@16480000 {
|
|
compatible = "samsung,exynos8895-pmu",
|
|
"samsung,exynos7-pmu", "syscon";
|
|
reg = <0x16480000 0x10000>;
|
|
};
|
|
|
|
pinctrl_alive: pinctrl@164b0000 {
|
|
compatible = "samsung,exynos8895-pinctrl";
|
|
reg = <0x164b0000 0x1000>;
|
|
|
|
wakeup-interrupt-controller {
|
|
compatible = "samsung,exynos8895-wakeup-eint",
|
|
"samsung,exynos7-wakeup-eint";
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
|
|
timer {
|
|
compatible = "arm,armv8-timer";
|
|
/* Hypervisor Virtual Timer interrupt is not wired to GIC */
|
|
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
|
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
|
|
/*
|
|
* Non-updatable, broken stock Samsung bootloader does not
|
|
* configure CNTFRQ_EL0
|
|
*/
|
|
clock-frequency = <26000000>;
|
|
};
|
|
};
|
|
|
|
#include "exynos8895-pinctrl.dtsi"
|
|
#include "arm/samsung/exynos-syscon-restart.dtsi"
|