319 lines
5.9 KiB
Plaintext
319 lines
5.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 PHYTEC Messtechnik GmbH
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*/
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/dts-v1/;
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#include <dt-bindings/leds/leds-pca9532.h>
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#include <dt-bindings/pwm/pwm.h>
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#include "imx95-phycore-fpsc.dtsi"
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/ {
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compatible = "phytec,imx95-libra-rdk-fpsc",
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"phytec,imx95-phycore-fpsc", "fsl,imx95";
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model = "PHYTEC Libra i.MX95 RDK FPSC";
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aliases {
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can1 = &flexcan2;
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can2 = &flexcan1;
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ethernet0 = &enetc_port0;
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serial0 = &lpuart7;
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serial1 = &lpuart8;
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};
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chosen {
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stdout-path = &lpuart7;
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};
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backlight_lvds0: backlight0 {
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compatible = "pwm-backlight";
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pinctrl-0 = <&pinctrl_lvds0>;
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power-supply = <®_vdd_12v0>;
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status = "disabled";
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};
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transceiver1: can-phy {
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compatible = "ti,tcan1043";
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#phy-cells = <0>;
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max-bitrate = <8000000>;
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enable-gpios = <&gpio_expander 10 GPIO_ACTIVE_LOW>;
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};
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transceiver2: can-phy {
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compatible = "ti,tcan1043";
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#phy-cells = <0>;
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max-bitrate = <8000000>;
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enable-gpios = <&gpio_expander 9 GPIO_ACTIVE_LOW>;
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};
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panel0_lvds: panel-lvds0 {
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backlight = <&backlight_lvds0>;
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power-supply = <®_vdd_3v3>;
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status = "disabled";
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};
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reg_vdd_12v0: regulator-vdd-12v0 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <12000000>;
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regulator-min-microvolt = <12000000>;
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regulator-name = "VDD_12V0";
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};
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reg_vdd_1v8: regulator-vdd-1v8 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-name = "VDD_1V8";
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};
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reg_vdd_3v3: regulator-vdd-3v3 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "VDD_3V3";
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};
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reg_vdd_5v0: regulator-vdd-5v0 {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "VDD_5V0";
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};
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};
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&enetc_port0 {
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phy-handle = <ðphy0>;
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status = "okay";
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};
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&enetc_port2 {
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managed = "in-band-status";
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phy-handle = <ðphy2>;
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phy-mode = "10gbase-r";
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};
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/* CAN FD */
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&flexcan1 {
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phys = <&transceiver1>;
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status = "okay";
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};
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&flexcan2 {
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phys = <&transceiver2>;
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status = "okay";
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};
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/* SPI-NOR */
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&flexspi1 {
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pinctrl-0 = <&pinctrl_flexspi>;
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pinctrl-names = "default";
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status = "okay";
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spi_nor: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <166000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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vcc-supply = <®_vdd_1v8>;
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};
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};
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&gpio2 {
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gpio-line-names = "", "", "", "", "",
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"", "", "", "", "",
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"", "", "", "", "",
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"", "RGMII2_nINT", "GPIO4", "RTC_INT", "",
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"LVDS1_BL_EN";
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};
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&lpi2c1 {
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temperature-sensor@4f {
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compatible = "nxp,p3t1755";
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reg = <0x4f>;
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vs-supply = <®_vdd_1v8>;
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};
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};
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&lpi2c3 {
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status = "okay";
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leds@62 {
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compatible = "nxp,pca9533";
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reg = <0x62>;
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led-1 {
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type = <PCA9532_TYPE_LED>;
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};
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led-2 {
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type = <PCA9532_TYPE_LED>;
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};
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led-3 {
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type = <PCA9532_TYPE_LED>;
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};
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};
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};
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&lpi2c4 {
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status = "okay";
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gpio_expander: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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interrupt-parent = <&gpio2>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-line-names = "CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3",
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"CSI1_CTRL4", "CSI2_CTRL1", "CSI2_CTRL2",
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"CSI2_CTRL3", "CSI2_CTRL4", "CLK_EN_AV",
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"nCAN2_EN", "nCAN1_EN", "PCIE1_nWAKE",
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"PCIE2_nWAKE", "PCIE2_nALERT_3V3",
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"UART1_BT_RS_SEL", "UART1_RS232_485_SEL";
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vcc-supply = <®_vdd_1v8>;
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uart1_bt_rs_sel: bt-rs-hog {
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gpios = <14 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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line-name = "UART1_BT_RS_SEL";
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output-low;
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};
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};
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};
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&lpi2c5 {
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status = "okay";
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eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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vcc-supply = <®_vdd_1v8>;
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};
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};
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/* Used for M33 debug */
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&lpuart2 {
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pinctrl-0 = <&pinctrl_lpuart2>;
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pinctrl-names = "default";
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};
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/* A-55 debug UART */
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&lpuart7 {
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status = "okay";
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};
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/* RS232/RS485/BT */
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&lpuart8 {
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uart-has-rtscts;
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status = "okay";
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};
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&netc_emdio { /* RGMII2 */
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ethphy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1>;
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interrupt-parent = <&gpio2>;
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interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
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enet-phy-lane-no-swap;
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ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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};
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ethphy2: ethernet-phy@8 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0x8>;
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max-speed = <10000>; /* 10Gbit/s */
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status = "disabled";
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};
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};
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&pcie0 {
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reset-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
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vpcie-supply = <®_vdd_3v3>;
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status = "okay";
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};
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&pcie1 {
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reset-gpio = <&gpio1 14 GPIO_ACTIVE_LOW>;
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vpcie-supply = <®_vdd_3v3>;
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status = "okay";
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};
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&rv3028 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupt-parent = <&gpio2>;
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interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
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aux-voltage-chargeable = <1>;
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wakeup-source;
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trickle-resistor-ohms = <3000>;
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};
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&scmi_iomuxc {
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pinctrl_lpuart2: lpuart2grp { /* FPSC proprietary */
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fsl,pins = <
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IMX95_PAD_UART2_TXD__AONMIX_TOP_LPUART2_TX 0x31e
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IMX95_PAD_UART2_RXD__AONMIX_TOP_LPUART2_RX 0x31e
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>;
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};
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pinctrl_lvds0: lvds0grp {
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fsl,pins = <
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IMX95_PAD_GPIO_IO20__GPIO2_IO_BIT20 0x31e
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>;
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};
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pinctrl_rtc: rtcgrp {
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fsl,pins = <
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IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18 0x31e
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>;
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};
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pinctrl_tpm4: tpm4grp {
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fsl,pins = <
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IMX95_PAD_GPIO_IO21__TPM4_CH1 0x51e
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>;
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};
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};
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&tpm4 {
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pinctrl-0 = <&pinctrl_tpm4>;
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pinctrl-names = "default";
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};
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&usb3 {
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fsl,over-current-active-low;
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fsl,power-active-low;
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status = "okay";
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};
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&usb3_dwc3 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb3_phy {
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vbus-supply = <®_vdd_5v0>;
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status = "okay";
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};
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/* uSD Card */
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&usdhc2 {
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status = "okay";
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};
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