99 lines
1.9 KiB
Plaintext
99 lines
1.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/**
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* Device Tree Source for enabling IPC using TI SDK firmware on AM62A SoCs
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*
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* Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
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*/
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&reserved_memory {
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c7x_0_dma_memory_region: memory@99800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x99800000 0x00 0x100000>;
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no-map;
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};
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c7x_0_memory_region: memory@99900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x99900000 0x00 0xf00000>;
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no-map;
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};
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mcu_r5fss0_core0_dma_memory_region: memory@9b800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b800000 0x00 0x100000>;
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no-map;
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};
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mcu_r5fss0_core0_memory_region: memory@9b900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b900000 0x00 0xf00000>;
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no-map;
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};
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};
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&mailbox0_cluster0 {
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status = "okay";
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mbox_r5_0: mbox-r5-0 {
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ti,mbox-rx = <0 0 0>;
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ti,mbox-tx = <1 0 0>;
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};
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};
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&mailbox0_cluster1 {
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status = "okay";
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mbox_c7x_0: mbox-c7x-0 {
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ti,mbox-rx = <0 0 0>;
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ti,mbox-tx = <1 0 0>;
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};
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};
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&mailbox0_cluster2 {
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status = "okay";
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mbox_mcu_r5_0: mbox-mcu-r5-0 {
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ti,mbox-rx = <0 0 0>;
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ti,mbox-tx = <1 0 0>;
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};
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};
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&wkup_r5fss0 {
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status = "okay";
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};
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&wkup_r5fss0_core0 {
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mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
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memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
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<&wkup_r5fss0_core0_memory_region>;
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status = "okay";
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};
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&mcu_r5fss0 {
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status = "okay";
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};
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&mcu_r5fss0_core0 {
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mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
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memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
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<&mcu_r5fss0_core0_memory_region>;
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status = "okay";
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};
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&c7x_0 {
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mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
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memory-region = <&c7x_0_dma_memory_region>,
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<&c7x_0_memory_region>;
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status = "okay";
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};
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/* main_rti4 is used by C7x DSP */
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&main_rti4 {
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status = "reserved";
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};
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/* main_timer2 is used by C7x DSP */
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&main_timer2 {
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status = "reserved";
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};
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