371 lines
8.8 KiB
Plaintext
371 lines
8.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
|
/*
|
|
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
|
|
* Author: Dominik Haller <d.haller@phytec.de>
|
|
*
|
|
* https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/net/ti-dp83867.h>
|
|
#include "k3-j721s2.dtsi"
|
|
|
|
/ {
|
|
compatible = "phytec,am68-phycore-som", "ti,j721s2";
|
|
model = "PHYTEC phyCORE-AM68x";
|
|
|
|
aliases {
|
|
ethernet1 = &main_cpsw_port1;
|
|
mmc0 = &main_sdhci0;
|
|
rtc0 = &i2c_som_rtc;
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
/* 4GB RAM */
|
|
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
|
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
|
bootph-all;
|
|
};
|
|
|
|
reserved_memory: reserved-memory {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
/* global cma region */
|
|
linux,cma {
|
|
compatible = "shared-dma-pool";
|
|
reusable;
|
|
size = <0x00 0x20000000>;
|
|
linux,cma-default;
|
|
};
|
|
|
|
secure_ddr: optee@9e800000 {
|
|
reg = <0x00 0x9e800000 0x00 0x01800000>;
|
|
alignment = <0x1000>;
|
|
no-map;
|
|
};
|
|
|
|
mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {
|
|
compatible = "shared-dma-pool";
|
|
reg = <0x00 0xa0000000 0x00 0x100000>;
|
|
no-map;
|
|
};
|
|
|
|
mcu_r5fss0_core0_memory_region: memory@a0100000 {
|
|
compatible = "shared-dma-pool";
|
|
reg = <0x00 0xa0100000 0x00 0xf00000>;
|
|
no-map;
|
|
};
|
|
};
|
|
|
|
vdd_sd_dv: regulator-sd {
|
|
/* Output of TLV71033 */
|
|
compatible = "regulator-gpio";
|
|
regulator-name = "VDD_SD_DV";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
gpios = <&main_gpio0 1 GPIO_ACTIVE_HIGH>;
|
|
states = <3300000 0x0>,
|
|
<1800000 0x1>;
|
|
};
|
|
};
|
|
|
|
&main_pmx0 {
|
|
main_cpsw_mdio_pins_default: main-cpsw-mdio-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
|
|
J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
|
|
>;
|
|
};
|
|
|
|
main_i2c0_pins_default: main-i2c0-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
|
|
J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
|
|
>;
|
|
};
|
|
|
|
rgmii1_pins_default: rgmii1-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
|
|
J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
|
|
J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
|
|
J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
|
|
J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
|
|
J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
|
|
J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
|
|
J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
|
|
J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
|
|
J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
|
|
J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
|
|
J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
|
|
>;
|
|
};
|
|
|
|
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_IOPAD(0x004, PIN_OUTPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&wkup_pmx0 {
|
|
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
|
|
J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
|
|
J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
|
|
J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
|
|
J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
|
|
J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
|
|
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
|
|
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
|
|
J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
|
|
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
|
|
J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
|
|
>;
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&wkup_pmx1 {
|
|
pmic_irq_pins_default: pmic-irq-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&wkup_pmx2 {
|
|
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
|
|
pinctrl-single,pins = <
|
|
J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SCL */
|
|
J721S2_WKUP_IOPAD(0x09c, PIN_INPUT_PULLUP, 0) /* (H27) WKUP_I2C0_SDA */
|
|
>;
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&main_cpsw {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii1_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
&main_cpsw_mdio {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_cpsw_mdio_pins_default>;
|
|
status = "okay";
|
|
|
|
phy1: ethernet-phy@0 {
|
|
reg = <0>;
|
|
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
|
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
|
ti,min-output-impedance;
|
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
|
};
|
|
};
|
|
|
|
&main_cpsw_port1 {
|
|
phy-handle = <&phy1>;
|
|
phy-mode = "rgmii-rxid";
|
|
status = "okay";
|
|
};
|
|
|
|
&main_i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_i2c0_pins_default>;
|
|
|
|
temperature-sensor@48 {
|
|
compatible = "ti,tmp102";
|
|
reg = <0x48>;
|
|
};
|
|
|
|
temperature-sensor@49 {
|
|
compatible = "ti,tmp102";
|
|
reg = <0x49>;
|
|
};
|
|
|
|
i2c_som_rtc: rtc@52 {
|
|
compatible = "microcrystal,rv3028";
|
|
reg = <0x52>;
|
|
};
|
|
};
|
|
|
|
&main_gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
/* eMMC */
|
|
&main_sdhci0 {
|
|
non-removable;
|
|
ti,driver-strength-ohm = <50>;
|
|
bootph-all;
|
|
status = "okay";
|
|
};
|
|
|
|
/* SD card */
|
|
&main_sdhci1 {
|
|
vqmmc-supply = <&vdd_sd_dv>;
|
|
bootph-all;
|
|
};
|
|
|
|
&ospi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
|
|
status = "okay";
|
|
|
|
serial_flash: flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0x0>;
|
|
spi-tx-bus-width = <8>;
|
|
spi-rx-bus-width = <8>;
|
|
spi-max-frequency = <25000000>;
|
|
cdns,tshsl-ns = <60>;
|
|
cdns,tsd2d-ns = <60>;
|
|
cdns,tchsh-ns = <60>;
|
|
cdns,tslch-ns = <60>;
|
|
cdns,read-delay = <2>;
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&wkup_gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&wkup_i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wkup_i2c0_pins_default>;
|
|
clock-frequency = <400000>;
|
|
status = "okay";
|
|
|
|
vdd_cpu_avs: regulator@40 {
|
|
compatible = "ti,tps62873";
|
|
reg = <0x40>;
|
|
regulator-name = "VDD_CPU_AVS";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <900000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
pmic@48 {
|
|
compatible = "ti,tps6594-q1";
|
|
reg = <0x48>;
|
|
system-power-controller;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pmic_irq_pins_default>;
|
|
interrupt-parent = <&wkup_gpio0>;
|
|
interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
buck12-supply = <&vcc_3v3>;
|
|
buck3-supply = <&vcc_3v3>;
|
|
buck4-supply = <&vcc_3v3>;
|
|
buck5-supply = <&vcc_3v3>;
|
|
ldo1-supply = <&vcc_3v3>;
|
|
ldo2-supply = <&vcc_3v3>;
|
|
ldo3-supply = <&vcc_3v3>;
|
|
ldo4-supply = <&vcc_3v3>;
|
|
ti,primary-pmic;
|
|
|
|
regulators {
|
|
bucka12: buck12 {
|
|
regulator-name = "VDD_DDR_1V1";
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
bucka3: buck3 {
|
|
regulator-name = "VDD_RAM_0V85";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
bucka4: buck4 {
|
|
regulator-name = "VDD_IO_1V8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
bucka5: buck5 {
|
|
regulator-name = "VDD_MCU_0V85";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
ldoa1: ldo1 {
|
|
regulator-name = "VDD_MCUIO_1V8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
ldoa2: ldo2 {
|
|
regulator-name = "VDD_MCUIO_3V3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
ldoa3: ldo3 {
|
|
regulator-name = "VDDA_DLL_0V8";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
|
|
ldoa4: ldo4 {
|
|
regulator-name = "VDDA_MCU_1V8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
bootph-all;
|
|
};
|
|
};
|
|
};
|
|
|
|
eeprom@50 {
|
|
compatible = "atmel,24c32";
|
|
reg = <0x50>;
|
|
pagesize = <32>;
|
|
bootph-all;
|
|
};
|
|
|
|
som_eeprom_opt: eeprom@51 {
|
|
compatible = "atmel,24c32";
|
|
reg = <0x51>;
|
|
pagesize = <32>;
|
|
};
|
|
};
|
|
|
|
#include "k3-j721s2-ti-ipc-firmware.dtsi"
|