66 lines
1.6 KiB
YAML
66 lines
1.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/ti,clkctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments clkctrl clock
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maintainers:
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- Tony Lindgren <tony@atomide.com>
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- Andreas Kemnade <andreas@kemnade.info>
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description: |
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Texas Instruments SoCs can have a clkctrl clock controller for each
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interconnect target module. The clkctrl clock controller manages functional
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and interface clocks for each module. Each clkctrl controller can also
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gate one or more optional functional clocks for a module, and can have one
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or more clock muxes. There is a clkctrl clock controller typically for each
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interconnect target module on omap4 and later variants.
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The clock consumers can specify the index of the clkctrl clock using
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the hardware offset from the clkctrl instance register space. The optional
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clocks can be specified by clkctrl hardware offset and the index of the
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optional clock.
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properties:
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compatible:
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enum:
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- ti,clkctrl
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- ti,clkctrl-l4-cfg
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- ti,clkctrl-l4-per
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- ti,clkctrl-l4-secure
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- ti,clkctrl-l4-wkup
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"#clock-cells":
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const: 2
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clock-output-names:
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maxItems: 1
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reg:
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minItems: 1
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maxItems: 8 # arbitrary, should be enough
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required:
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- compatible
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- "#clock-cells"
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- clock-output-names
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- reg
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additionalProperties: false
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examples:
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- |
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bus {
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#address-cells = <1>;
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#size-cells = <1>;
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clock@20 {
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compatible = "ti,clkctrl";
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clock-output-names = "l4_per";
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reg = <0x20 0x1b0>;
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#clock-cells = <2>;
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};
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};
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