152 lines
3.7 KiB
YAML
152 lines
3.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek MT8195 series HDMI-TX Encoder
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maintainers:
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- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- CK Hu <ck.hu@mediatek.com>
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description:
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The MediaTek HDMI-TX v2 encoder can generate HDMI format data based on
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the HDMI Specification 2.0b.
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properties:
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compatible:
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enum:
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- mediatek,mt8188-hdmi-tx
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- mediatek,mt8195-hdmi-tx
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: HDMI Peripheral Bus (APB) clock
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- description: HDCP and HDMI_TOP clock
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- description: HDCP, HDMI_TOP and HDMI Audio reference clock
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- description: VPP HDMI Split clock
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clock-names:
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items:
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- const: bus
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- const: hdcp
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- const: hdcp24m
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- const: hdmi-split
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i2c:
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type: object
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$ref: /schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
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unevaluatedProperties: false
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description: HDMI DDC I2C controller
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phys:
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maxItems: 1
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description: PHY providing clocking TMDS and pixel to controller
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phy-names:
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items:
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- const: hdmi
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power-domains:
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maxItems: 1
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'#sound-dai-cells':
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const: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Input port, usually connected to the output port of a DPI
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output port that must be connected either to the input port of
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a HDMI connector node containing a ddc-i2c-bus, or to the input
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port of an attached bridge chip, such as a SlimPort transmitter.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- power-domains
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- phys
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- phy-names
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- ports
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allOf:
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- $ref: /schemas/sound/dai-common.yaml#
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/mt8195-power.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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hdmi@1c300000 {
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compatible = "mediatek,mt8195-hdmi-tx";
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reg = <0 0x1c300000 0 0x1000>;
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clocks = <&topckgen CLK_TOP_HDMI_APB>,
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<&topckgen CLK_TOP_HDCP>,
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<&topckgen CLK_TOP_HDCP_24M>,
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<&vppsys1 CLK_VPP1_VPP_SPLIT_HDMI>;
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clock-names = "bus", "hdcp", "hdcp24m", "hdmi-split";
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interrupts = <GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH 0>;
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phys = <&hdmi_phy>;
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phy-names = "hdmi";
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power-domains = <&spm MT8195_POWER_DOMAIN_HDMI_TX>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pins>;
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#sound-dai-cells = <1>;
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hdmitx_ddc: i2c {
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compatible = "mediatek,mt8195-hdmi-ddc";
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clocks = <&clk26m>;
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_in: endpoint {
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remote-endpoint = <&dpi1_out>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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};
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