171 lines
4.2 KiB
YAML
171 lines
4.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip RK3399 specific extensions to the CDN Display Port
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maintainers:
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- Andy Yan <andy.yan@rock-chip.com>
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- Heiko Stuebner <heiko@sntech.de>
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- Sandy Huang <hjc@rock-chips.com>
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allOf:
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- $ref: /schemas/sound/dai-common.yaml#
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properties:
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compatible:
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items:
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- const: rockchip,rk3399-cdn-dp
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reg:
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maxItems: 1
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clocks:
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items:
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- description: DP core work clock
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- description: APB clock
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- description: SPDIF interface clock
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- description: GRF clock
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clock-names:
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items:
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- const: core-clk
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- const: pclk
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- const: spdif
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- const: grf
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extcon:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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minItems: 1
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items:
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- description: Extcon device providing the cable state for DP PHY device 0
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- description: Extcon device providing the cable state for DP PHY device 1
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description:
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List of phandle to the extcon device providing the cable state for the DP PHY.
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interrupts:
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maxItems: 1
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phys:
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minItems: 1
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items:
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- description: DP output to the DP PHY device 0
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- description: DP output to the DP PHY device 1
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description:
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RK3399 have two DP-USB PHY, specifying one PHY which want to use, or
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specify two PHYs here to let the driver determine which PHY to use.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Input of the CDN DP
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properties:
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endpoint@0:
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description: Connection to the VOPB
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endpoint@1:
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description: Connection to the VOPL
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Output of the CDN DP
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required:
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- port@0
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- port@1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 4
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reset-names:
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items:
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- const: spdif
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- const: dptx
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- const: apb
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- const: core
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to GRF register to control HPD.
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"#sound-dai-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- phys
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- ports
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- resets
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- reset-names
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- rockchip,grf
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- "#sound-dai-cells"
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3399-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/rk3399-power.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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dp@fec00000 {
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compatible = "rockchip,rk3399-cdn-dp";
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reg = <0x0 0xfec00000 0x0 0x100000>;
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assigned-clocks = <&cru SCLK_DP_CORE>;
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assigned-clock-rates = <100000000>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, <&cru SCLK_SPDIF_REC_DPTX>,
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<&cru PCLK_VIO_GRF>;
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clock-names = "core-clk", "pclk", "spdif", "grf";
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power-domains = <&power RK3399_PD_HDCP>;
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phys = <&tcphy0_dp>, <&tcphy1_dp>;
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resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
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<&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
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reset-names = "spdif", "dptx", "apb", "core";
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rockchip,grf = <&grf>;
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#sound-dai-cells = <1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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dp_in: port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dp_in_vopb: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vopb_out_dp>;
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};
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dp_in_vopl: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vopl_out_dp>;
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};
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};
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dp_out: port@1 {
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reg = <1>;
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};
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};
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};
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};
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