79 lines
1.9 KiB
YAML
79 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/chrp,open-pic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Open PIC Interrupt Controller
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maintainers:
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- Rob Herring <robh@kernel.org>
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description:
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This binding specifies what properties must be available in the device tree
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representation of an Open PIC compliant interrupt controller. This binding is
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based on the binding defined for Open PIC in [1] and is a superset of that
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binding.
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properties:
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compatible:
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oneOf:
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- items:
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- const: fsl,mpic
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- const: chrp,open-pic
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- const: chrp,open-pic
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device_type:
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const: open-pci
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deprecated: true
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reg:
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maxItems: 1
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interrupt-controller: true
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'#address-cells':
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const: 0
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'#interrupt-cells':
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description:
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A value of 4 means that interrupt specifiers contain the interrupt-type or
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type-specific information cells.
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enum: [ 2, 4 ]
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pic-no-reset:
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description: Indicates the PIC shall not be reset during runtime initialization.
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type: boolean
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single-cpu-affinity:
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description:
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If present, non-IPI interrupts will be routed to a single CPU at a time.
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type: boolean
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last-interrupt-source:
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description:
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Some MPICs do not correctly report the number of hardware sources in the
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global feature registers. This value, if specified, overrides the value
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read from MPIC_GREG_FEATURE_LAST_SRC.
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- compatible
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- reg
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- interrupt-controller
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- '#address-cells'
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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interrupt-controller@40000 {
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compatible = "chrp,open-pic";
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reg = <0x40000 0x40000>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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pic-no-reset;
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};
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