110 lines
2.8 KiB
YAML
110 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SDM660 SoC LPASS LPI TLMM
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maintainers:
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- Nickolay Goppen <setotau@mainlining.org>
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description:
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Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
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(LPASS) Low Power Island (LPI) of Qualcomm SDM660 SoC.
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properties:
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compatible:
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const: qcom,sdm660-lpass-lpi-pinctrl
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reg:
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items:
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- description: LPASS LPI TLMM Control and Status registers
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-sdm660-lpass-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-sdm660-lpass-state"
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additionalProperties: false
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$defs:
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qcom-sdm660-lpass-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
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unevaluatedProperties: false
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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pattern: "^gpio([0-9]|[1-2][0-9]|3[0-1])$"
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function:
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enum: [ gpio, comp_rx, dmic1_clk, dmic1_data, dmic2_clk, dmic2_data,
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mclk0, pdm_tx, pdm_clk, pdm_rx, pdm_sync ]
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description:
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Specify the alternative function to be configured for the specified
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pins.
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allOf:
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- $ref: qcom,lpass-lpi-common.yaml#
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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lpi_tlmm: pinctrl@15070000 {
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compatible = "qcom,sdm660-lpass-lpi-pinctrl";
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reg = <0x15070000 0x20000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&lpi_tlmm 0 0 32>;
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cdc_pdm_default: cdc-pdm-default-state {
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clk-pins {
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pins = "gpio18";
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function = "pdm_clk";
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drive-strength = <8>;
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output-high;
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};
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sync-pins{
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pins = "gpio19";
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function = "pdm_sync";
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drive-strength = <4>;
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output-high;
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};
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tx-pins {
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pins = "gpio20";
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function = "pdm_tx";
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drive-strength = <8>;
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};
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rx-pins {
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pins = "gpio21", "gpio23", "gpio25";
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function = "pdm_rx";
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drive-strength = <4>;
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output-high;
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};
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};
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cdc_comp_default: cdc-comp-default-state {
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pins = "gpio22", "gpio24";
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function = "comp_rx";
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drive-strength = <8>;
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};
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};
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