336 lines
7.3 KiB
Plaintext
336 lines
7.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Broadcom BCM63138 DSL SoCs Device Tree
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm63138", "brcm,bcmbca";
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model = "Broadcom BCM963138 Reference Board";
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interrupt-parent = <&gic>;
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aliases {
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uart0 = &serial0;
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uart1 = &serial1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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next-level-cache = <&L2>;
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reg = <0>;
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enable-method = "brcm,bcm63138";
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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next-level-cache = <&L2>;
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reg = <1>;
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enable-method = "brcm,bcm63138";
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resets = <&pmb0 4 1>;
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};
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};
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clocks {
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/* UBUS peripheral clock */
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periph_clk: periph_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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/* peripheral clock for system timer */
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axi_clk: axi_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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/* APB bus clock */
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apb_clk: apb_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <4>;
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clock-mult = <1>;
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};
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hsspi_pll: hsspi-pll {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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};
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};
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/* ARM bus */
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axi@80000000 {
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compatible = "simple-bus";
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ranges = <0 0x80000000 0x784000>;
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#address-cells = <1>;
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#size-cells = <1>;
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L2: cache-controller@1d000 {
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compatible = "arm,pl310-cache";
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reg = <0x1d000 0x1000>;
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cache-unified;
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cache-level = <2>;
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cache-size = <524288>;
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cache-sets = <1024>;
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cache-line-size = <32>;
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interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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scu: scu@1e000 {
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compatible = "arm,cortex-a9-scu";
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reg = <0x1e000 0x100>;
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};
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gic: interrupt-controller@1f000 {
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compatible = "arm,cortex-a9-gic";
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reg = <0x1f000 0x1000
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0x1e100 0x100>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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};
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global_timer: timer@1e200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x1e200 0x20>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
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clocks = <&axi_clk>;
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};
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local_timer: local-timer@1e600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x1e600 0x20>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
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IRQ_TYPE_EDGE_RISING)>;
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clocks = <&axi_clk>;
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};
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twd_watchdog: watchdog@1e620 {
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compatible = "arm,cortex-a9-twd-wdt";
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reg = <0x1e620 0x20>;
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interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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armpll: armpll@20000 {
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#clock-cells = <0>;
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compatible = "brcm,bcm63138-armpll";
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clocks = <&periph_clk>;
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reg = <0x20000 0xf00>;
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};
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pmb0: reset-controller@4800c0 {
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compatible = "brcm,bcm63138-pmb";
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reg = <0x4800c0 0x10>;
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#reset-cells = <2>;
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};
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pmb1: reset-controller@4800e0 {
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compatible = "brcm,bcm63138-pmb";
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reg = <0x4800e0 0x10>;
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#reset-cells = <2>;
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};
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ahci: sata@a000 {
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compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
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reg-names = "ahci", "top-ctrl";
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reg = <0xa000 0x9ac>, <0x8040 0x24>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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resets = <&pmb0 3 1>;
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reset-names = "ahci";
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status = "disabled";
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy0>;
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};
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};
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sata_phy: sata-phy@8100 {
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compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
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reg = <0x8100 0x1e00>;
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reg-names = "phy";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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sata_phy0: sata-phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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};
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};
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/* Legacy UBUS base */
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ubus@fffe8000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xfffe8000 0x10000>;
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timer: timer@80 {
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compatible = "brcm,bcm6328-timer", "syscon";
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reg = <0x80 0x3c>;
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};
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/* GPIOs 0 .. 31 */
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gpio0: gpio@100 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x100 0x04>, <0x114 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 32 .. 63 */
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gpio1: gpio@104 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x104 0x04>, <0x118 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 64 .. 95 */
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gpio2: gpio@108 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x108 0x04>, <0x11c 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 96 .. 127 */
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gpio3: gpio@10c {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10c 0x04>, <0x120 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 128 .. 159 */
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gpio4: gpio@110 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x110 0x04>, <0x124 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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rng@300 {
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compatible = "brcm,iproc-rng200";
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reg = <0x300 0x28>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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};
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serial0: serial@600 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x600 0x1b>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&periph_clk>;
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clock-names = "periph";
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status = "disabled";
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};
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serial1: serial@620 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x620 0x1b>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&periph_clk>;
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clock-names = "periph";
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status = "disabled";
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};
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leds: led-controller@700 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm63138-leds";
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reg = <0x700 0xdc>;
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status = "disabled";
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};
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hsspi: spi@1000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm63138-hsspi", "brcm,bcmbca-hsspi-v1.0";
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reg = <0x1000 0x600>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&hsspi_pll &hsspi_pll>;
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clock-names = "hsspi", "pll";
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num-cs = <8>;
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status = "disabled";
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};
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nand_controller: nand-controller@2000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
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reg = <0x2000 0x600>, <0xf0 0x10>;
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reg-names = "nand", "nand-int-base";
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status = "disabled";
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "nand_ctlrdy";
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nandcs: nand@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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};
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};
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serial@4400 {
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compatible = "brcm,bcm63138-hs-uart", "brcm,bcmbca-hs-uart";
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reg = <0x4400 0x1e0>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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bootlut: bootlut@8000 {
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compatible = "brcm,bcm63138-bootlut";
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reg = <0x8000 0x50>;
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};
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pl081_dma: dma-controller@d000 {
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compatible = "arm,pl081", "arm,primecell";
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// The magic B105F00D info is missing
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arm,primecell-periphid = <0x00041081>;
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reg = <0xd000 0x1000>;
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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memcpy-burst-size = <256>;
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memcpy-bus-width = <32>;
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clocks = <&periph_clk>;
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clock-names = "apb_pclk";
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#dma-cells = <2>;
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};
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reboot {
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compatible = "syscon-reboot";
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regmap = <&timer>;
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offset = <0x34>;
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mask = <1>;
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};
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};
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};
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