Linux-6.18.2/arch/arm64/boot/dts/exynos/exynos2200.dtsi
2025-12-23 20:06:59 +08:00

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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Samsung's Exynos 2200 SoC device tree source
*
* Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
*/
#include <dt-bindings/clock/samsung,exynos2200-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>
/ {
compatible = "samsung,exynos2200";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_alive;
pinctrl1 = &pinctrl_cmgp;
pinctrl2 = &pinctrl_hsi1;
pinctrl3 = &pinctrl_ufs;
pinctrl4 = &pinctrl_hsi1ufs;
pinctrl5 = &pinctrl_peric0;
pinctrl6 = &pinctrl_peric1;
pinctrl7 = &pinctrl_peric2;
pinctrl8 = &pinctrl_vts;
};
xtcxo: clock-1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "oscclk";
};
ext_26m: clock-2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-26m";
};
ext_200m: clock-3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-200m";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
};
cluster2 {
core0 {
cpu = <&cpu7>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x100>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x200>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a510";
reg = <0x300>;
capacity-dmips-mhz = <260>;
dynamic-power-coefficient = <189>;
enable-method = "psci";
cpu-idle-states = <&little_cpu_sleep>;
};
cpu4: cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x400>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu5: cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x500>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu6: cpu@600 {
device_type = "cpu";
compatible = "arm,cortex-a710";
reg = <0x600>;
capacity-dmips-mhz = <380>;
dynamic-power-coefficient = <560>;
enable-method = "psci";
cpu-idle-states = <&big_cpu_sleep>;
};
cpu7: cpu@700 {
device_type = "cpu";
compatible = "arm,cortex-x2";
reg = <0x700>;
capacity-dmips-mhz = <488>;
dynamic-power-coefficient = <765>;
enable-method = "psci";
cpu-idle-states = <&prime_cpu_sleep>;
};
idle-states {
entry-method = "psci";
little_cpu_sleep: cpu-sleep-0 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <70>;
exit-latency-us = <170>;
min-residency-us = <2000>;
arm,psci-suspend-param = <0x10000>;
};
big_cpu_sleep: cpu-sleep-1 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <235>;
exit-latency-us = <220>;
min-residency-us = <3500>;
arm,psci-suspend-param = <0x10000>;
};
prime_cpu_sleep: cpu-sleep-2 {
compatible = "arm,idle-state";
idle-state-name = "c2";
entry-latency-us = <150>;
exit-latency-us = <190>;
min-residency-us = <2500>;
arm,psci-suspend-param = <0x10000>;
};
};
};
pmu-a510 {
compatible = "arm,cortex-a510-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
};
pmu-a710 {
compatible = "arm,cortex-a710-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
};
pmu-x2 {
compatible = "arm,cortex-x2-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster2>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc@0 {
compatible = "simple-bus";
ranges = <0x0 0x0 0x0 0x20000000>;
#address-cells = <1>;
#size-cells = <1>;
chipid@10000000 {
compatible = "samsung,exynos2200-chipid",
"samsung,exynos850-chipid";
reg = <0x10000000 0x24>;
};
cmu_peris: clock-controller@10020000 {
compatible = "samsung,exynos2200-cmu-peris";
reg = <0x10020000 0x8000>;
#clock-cells = <1>;
clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>,
<&cmu_top CLK_DOUT_CMU_PERIS_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIS_GIC>;
clock-names = "tcxo_div3",
"noc",
"gic";
};
mct_peris: timer@10040000 {
compatible = "samsung,exynos2200-mct-peris",
"samsung,exynos4210-mct";
reg = <0x10040000 0x800>;
clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>, <&cmu_peris CLK_MOUT_PERIS_GIC>;
clock-names = "fin_pll", "mct";
interrupts = <GIC_SPI 943 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 944 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 947 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 948 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 954 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
};
gic: interrupt-controller@10200000 {
compatible = "arm,gic-v3";
reg = <0x10200000 0x10000>, /* GICD */
<0x10240000 0x200000>; /* GICR * 8 */
#address-cells = <0>;
#interrupt-cells = <4>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
ppi-partitions {
ppi_cluster0: interrupt-partition-0 {
affinity = <&cpu0 &cpu1 &cpu2 &cpu3>;
};
ppi_cluster1: interrupt-partition-1 {
affinity = <&cpu4 &cpu5 &cpu6>;
};
ppi_cluster2: interrupt-partition-2 {
affinity = <&cpu7>;
};
};
};
cmu_peric0: clock-controller@10400000 {
compatible = "samsung,exynos2200-cmu-peric0";
reg = <0x10400000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC0_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC0_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC0_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric0: syscon@10420000 {
compatible = "samsung,exynos2200-peric0-sysreg", "syscon";
reg = <0x10420000 0x10000>;
};
pinctrl_peric0: pinctrl@10430000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x10430000 0x1000>;
};
usi4: usi@105000c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x105000c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI04>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric0 0x1024>;
status = "disabled";
hsi2c_8: i2c@10500000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10500000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_DOUT_PERIC0_USI04>,
<&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c8_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_6: serial@10500000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x10500000 0xc0>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI04>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart6_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi4_i2c: usi@105100c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x105100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric0 CLK_DOUT_PERIC0_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric0 0x1024>;
status = "disabled";
hsi2c_9: i2c@10510000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10510000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric0 CLK_DOUT_PERIC0_I2C>,
<&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c9_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
cmu_peric1: clock-controller@10700000 {
compatible = "samsung,exynos2200-cmu-peric1";
reg = <0x10700000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC1_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC1_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC1_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric1: syscon@10720000 {
compatible = "samsung,exynos2200-peric1-sysreg", "syscon";
reg = <0x10720000 0x10000>;
};
pinctrl_peric1: pinctrl@10730000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x10730000 0x1000>;
};
usi7: usi@109000c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109000c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI07>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric1 0x2030>;
status = "disabled";
hsi2c_14: i2c@10900000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10900000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07>,
<&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c14_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_9: serial@10900000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x10900000 0xc0>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI07>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart9_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi7_i2c: usi@109100c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric1 0x2034>;
status = "disabled";
hsi2c_15: i2c@10910000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10910000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>,
<&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c15_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi8: usi@109200c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI08>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric1 0x2038>;
status = "disabled";
hsi2c_16: i2c@10920000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10920000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08>,
<&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c16_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_10: serial@10920000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x10920000 0xc0>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI08>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart10_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi8_i2c: usi@109300c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109300c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric1 0x203c>;
status = "disabled";
hsi2c_17: i2c@10930000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10930000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>,
<&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c17_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi9: usi@109400c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109400c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI09>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric1 0x2040>;
status = "disabled";
hsi2c_18: i2c@10940000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10940000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI09>,
<&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c18_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_11: serial@10940000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x10940000 0xc0>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI09>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart11_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi9_i2c: usi@109500c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109500c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric1 0x2044>;
status = "disabled";
hsi2c_19: i2c@10950000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10950000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>,
<&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c19_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi10: usi@109600c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109600c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI10>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric1 0x2048>;
status = "disabled";
hsi2c_20: i2c@10960000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10960000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_USI10>,
<&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c20_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_12: serial@10960000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x10960000 0xc0>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI10>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart12_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi10_i2c: usi@109700c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>,
<&cmu_peric1 CLK_DOUT_PERIC1_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric1 0x204c>;
status = "disabled";
hsi2c_21: i2c@10970000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x10970000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric1 CLK_DOUT_PERIC1_I2C>,
<&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c21_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
cmu_hsi0: clock-controller@10a00000 {
compatible = "samsung,exynos2200-cmu-hsi0";
reg = <0x10a00000 0x8000>;
#clock-cells = <1>;
};
usb32drd: phy@10aa0000 {
compatible = "samsung,exynos2200-usb32drd-phy";
reg = <0x10aa0000 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
clock-names = "phy";
#phy-cells = <1>;
phys = <&usb_hsphy>;
phy-names = "hs";
samsung,pmu-syscon = <&pmu_system_controller>;
status = "disabled";
};
usb_hsphy: phy@10ab0000 {
compatible = "samsung,exynos2200-eusb2-phy";
reg = <0x10ab0000 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>,
<&cmu_hsi0 CLK_MOUT_HSI0_NOC>,
<&cmu_hsi0 CLK_DOUT_DIV_CLK_HSI0_EUSB>;
clock-names = "ref", "bus", "ctrl";
#phy-cells = <0>;
status = "disabled";
};
usb: usb@10b00000 {
compatible = "samsung,exynos2200-dwusb3";
ranges = <0x0 0x10b00000 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
clock-names = "link_aclk";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
usb_dwc3: usb@0 {
compatible = "snps,dwc3";
reg = <0x0 0x10000>;
clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>;
clock-names = "ref";
interrupts = <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&usb32drd 0>;
phy-names = "usb2-phy";
snps,dis-u2-freeclk-exists-quirk;
snps,gfladj-refclk-lpm-sel-quirk;
snps,has-lpm-erratum;
snps,quirk-frame-length-adjustment = <0x20>;
snps,usb3_lpm_capable;
};
};
cmu_ufs: clock-controller@11000000 {
compatible = "samsung,exynos2200-cmu-ufs";
reg = <0x11000000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_UFS_NOC>,
<&cmu_top CLK_MOUT_CMU_UFS_MMC_CARD>,
<&cmu_top CLK_DOUT_CMU_UFS_UFS_EMBD>;
clock-names = "oscclk", "noc", "mmc", "ufs";
};
syscon_ufs: syscon@11020000 {
compatible = "samsung,exynos2200-ufs-sysreg", "syscon";
reg = <0x11020000 0x10000>;
};
pinctrl_ufs: pinctrl@11040000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x11040000 0x1000>;
};
pinctrl_hsi1ufs: pinctrl@11060000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x11060000 0x1000>;
};
pinctrl_hsi1: pinctrl@11240000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x11240000 0x1000>;
};
cmu_peric2: clock-controller@11c00000 {
compatible = "samsung,exynos2200-cmu-peric2";
reg = <0x11c00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_PERIC2_NOC>,
<&cmu_top CLK_DOUT_CMU_PERIC2_IP0>,
<&cmu_top CLK_DOUT_CMU_PERIC2_IP1>;
clock-names = "oscclk", "noc", "ip0", "ip1";
};
syscon_peric2: syscon@11c20000 {
compatible = "samsung,exynos2200-peric2-sysreg", "syscon";
reg = <0x11c20000 0x10000>;
};
pinctrl_peric2: pinctrl@11c30000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x11c30000 0x1000>;
};
usi0: usi@11d000c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d000c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI00>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x2000>;
status = "disabled";
hsi2c_0: i2c@11d00000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d00000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c0_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_2: serial@11d00000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11d00000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI00>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart2_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi0_i2c: usi@11d100c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x2004>;
status = "disabled";
hsi2c_1: i2c@11d10000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d10000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c1_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi1: usi@11d200c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI01>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x2008>;
status = "disabled";
hsi2c_2: i2c@11d20000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d20000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c2_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_3: serial@11d20000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11d20000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI01>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart3_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi1_i2c: usi@11d300c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d300c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x200c>;
status = "disabled";
hsi2c_3: i2c@11d30000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d30000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c3_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi2: usi@11d400c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d400c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI02>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x2010>;
status = "disabled";
hsi2c_4: i2c@11d40000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d40000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI02>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c4_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_4: serial@11d40000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11d40000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI02>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart4_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
usi2_i2c: usi@11d500c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d500c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x2014>;
status = "disabled";
hsi2c_5: i2c@11d50000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d50000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c5_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi3: usi@11d600c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d600c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI03>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x2018>;
status = "disabled";
hsi2c_6: i2c@11d60000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d60000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI03>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c6_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_5: serial@11d60000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11d60000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI03>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart5_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
usi3_i2c: usi@11d700c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d700c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x201c>;
status = "disabled";
hsi2c_7: i2c@11d70000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d70000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c7_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi5_i2c: usi@11d800c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d800c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x102c>;
status = "disabled";
hsi2c_11: i2c@11d80000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d80000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c11_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi6_i2c: usi@11d900c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11d900c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x1004>;
status = "disabled";
hsi2c_13: i2c@11d90000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d90000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c13_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi11: usi@11da00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11da00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI11>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x1058>;
status = "disabled";
hsi2c_22: i2c@11da0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11da0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI11>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c22_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_13: serial@11da0000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11da0000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI11>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart13_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi11_i2c: usi@11db00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11db00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_peric2 0x105c>;
status = "disabled";
hsi2c_23: i2c@11db0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11db0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_I2C>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c23_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi5: usi@11dd00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11dd00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI05>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x117c>;
status = "disabled";
hsi2c_10: i2c@11dd0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11dd0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI05>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c10_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_7: serial@11dd0000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11dd0000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI05>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart7_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
usi6: usi@11de00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x11de00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI06>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_peric2 0x1180>;
status = "disabled";
hsi2c_12: i2c@11de0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11de0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peric2 CLK_DOUT_PERIC2_USI06>,
<&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c12_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_8: serial@11de0000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x11de0000 0xc0>;
clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
<&cmu_peric2 CLK_DOUT_PERIC2_USI06>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart8_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
cmu_cmgp: clock-controller@14e00000 {
compatible = "samsung,exynos2200-cmu-cmgp";
reg = <0x14e00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_alive CLK_DOUT_ALIVE_CMGP_NOC>,
<&cmu_alive CLK_DOUT_ALIVE_CMGP_PERI>;
clock-names = "oscclk", "noc", "peri";
};
syscon_cmgp: syscon@14e20000 {
compatible = "samsung,exynos2200-cmgp-sysreg", "syscon";
reg = <0x14e20000 0x10000>;
};
pinctrl_cmgp: pinctrl@14e30000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x14e30000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos2200-wakeup-eint",
"samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
usi_cmgp0: usi@14f000c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f000c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI0>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2000>;
status = "disabled";
hsi2c_24: i2c@14f00000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f00000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI0>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c24_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_14: serial@14f00000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14f00000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI0>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart14_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp0: usi@14f100c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f100c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2070>;
status = "disabled";
hsi2c_25: i2c@14f10000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f10000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c25_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp1: usi@14f200c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f200c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI1>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2010>;
status = "disabled";
hsi2c_26: i2c@14f20000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f20000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI1>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c26_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_15: serial@14f20000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14f20000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI1>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart15_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp1: usi@14f300c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f300c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2074>;
status = "disabled";
hsi2c_27: i2c@14f30000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f30000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c27_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp2: usi@14f400c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f400c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI2>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2020>;
status = "disabled";
hsi2c_28: i2c@14f40000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f40000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI2>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c28_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_16: serial@14f40000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14f40000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI2>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart16_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp2: usi@14f500c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f500c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2024>;
status = "disabled";
hsi2c_29: i2c@14f50000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f50000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c29_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp3: usi@14f600c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f600c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI3>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2030>;
status = "disabled";
hsi2c_30: i2c@14f60000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f60000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI3>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c30_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_17: serial@14f60000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14f60000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI3>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart17_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp3: usi@14f700c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f700c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2034>;
status = "disabled";
hsi2c_31: i2c@14f70000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f70000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c31_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp4: usi@14f800c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f800c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI4>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2040>;
status = "disabled";
hsi2c_32: i2c@14f80000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f80000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI4>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c32_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_18: serial@14f80000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14f80000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI4>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart18_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp4: usi@14f900c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14f900c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2044>;
status = "disabled";
hsi2c_33: i2c@14f90000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14f90000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c33_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp5: usi@14fa00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14fa00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI5>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2050>;
status = "disabled";
hsi2c_34: i2c@14fa0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14fa0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI5>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c34_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_19: serial@14fa0000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14fa0000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI5>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart19_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp5: usi@14fb00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14fb00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2054>;
status = "disabled";
hsi2c_35: i2c@14fb0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14fb0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c35_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_cmgp6: usi@14fc00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14fc00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI6>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&syscon_cmgp 0x2060>;
status = "disabled";
hsi2c_36: i2c@14fc0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14fc0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_USI6>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c36_bus>;
pinctrl-names = "default";
status = "disabled";
};
serial_20: serial@14fc0000 {
compatible = "samsung,exynos2200-uart", "google,gs101-uart";
reg = <0x14fc0000 0xc0>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_USI6>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&uart20_bus_single>;
pinctrl-names = "default";
samsung,uart-fifosize = <64>;
status = "disabled";
};
};
usi_i2c_cmgp6: usi@14fd00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14fd00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2064>;
status = "disabled";
hsi2c_37: i2c@14fd0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14fd0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c37_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
usi_i2c_cmgp7: usi@14fe00c0 {
compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";
reg = <0x14fe00c0 0x20>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>,
<&cmu_cmgp CLK_DOUT_CMGP_I2C>;
clock-names = "pclk", "ipclk";
samsung,mode = <USI_MODE_I2C>;
samsung,sysreg = <&syscon_cmgp 0x2080>;
status = "disabled";
hsi2c_38: i2c@14fe0000 {
compatible = "samsung,exynos2200-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x14fe0000 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_cmgp CLK_DOUT_CMGP_I2C>,
<&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>;
clock-names = "hsi2c", "hsi2c_pclk";
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-0 = <&hsi2c38_bus>;
pinctrl-names = "default";
status = "disabled";
};
};
cmu_vts: clock-controller@15300000 {
compatible = "samsung,exynos2200-cmu-vts";
reg = <0x15300000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_VTS_DMIC>;
clock-names = "oscclk", "dmic";
};
pinctrl_vts: pinctrl@15320000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x15320000 0x1000>;
};
cmu_alive: clock-controller@15800000 {
compatible = "samsung,exynos2200-cmu-alive";
reg = <0x15800000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top CLK_DOUT_CMU_ALIVE_NOC>;
clock-names = "oscclk", "noc";
};
pinctrl_alive: pinctrl@15850000 {
compatible = "samsung,exynos2200-pinctrl";
reg = <0x15850000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos2200-wakeup-eint",
"samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
pmu_system_controller: system-controller@15860000 {
compatible = "samsung,exynos2200-pmu",
"samsung,exynos7-pmu", "syscon";
reg = <0x15860000 0x10000>;
reboot: syscon-reboot {
compatible = "syscon-reboot";
offset = <0x3c00>; /* SYSTEM_CONFIGURATION */
mask = <0x2>; /* SWRESET_SYSTEM */
value = <0x2>; /* reset value */
};
};
cmu_top: clock-controller@1a320000 {
compatible = "samsung,exynos2200-cmu-top";
reg = <0x1a320000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>;
clock-names = "oscclk";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
/*
* Non-updatable, broken stock Samsung bootloader does not
* configure CNTFRQ_EL0
*/
clock-frequency = <25600000>;
};
};
#include "exynos2200-pinctrl.dtsi"