61 lines
1.3 KiB
Plaintext
61 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 Josua Mayer <josua@solid-run.com>
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*/
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/ {
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rfkill-m2-gnss {
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compatible = "rfkill-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&m2_gnss_rfkill_pins>;
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label = "m.2 GNSS";
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radio-type = "gps";
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/* rfkill-gpio inverts internally */
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shutdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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};
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/* M.2 is B-keyed, so w-disable is for WWAN */
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rfkill-m2-wwan {
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compatible = "rfkill-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&m2_wwan_rfkill_pins>;
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label = "m.2 WWAN";
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radio-type = "wwan";
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/* rfkill-gpio inverts internally */
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shutdown-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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};
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};
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&iomuxc {
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m2_gnss_rfkill_pins: pinctrl-m2-gnss-rfkill-grp {
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fsl,pins = <
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/* weak i/o, open drain */
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MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x20
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>;
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};
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m2_reset_pins: pinctrl-m2-reset-grp {
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fsl,pins = <
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/*
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* 3.3V domain on SoC, set open-drain to ensure
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* 1.8V logic on connector
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*/
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MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x20
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>;
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};
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m2_wwan_rfkill_pins: pinctrl-m2-wwan-rfkill-grp {
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fsl,pins = <
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/* weak i/o, open drain */
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MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x20
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>;
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};
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m2_wwan_wake_pins: pinctrl-m2-wwan-wake-grp {
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fsl,pins = <
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/* weak i/o, open drain */
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x20
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>;
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};
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};
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