300 lines
7.2 KiB
Plaintext
300 lines
7.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023 PHYTEC Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>, Christoph Stoidner <c.stoidner@phytec.de>
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* Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com>
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*
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* Product homepage:
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* https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
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*/
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#include <dt-bindings/leds/common.h>
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#include "imx93.dtsi"
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/{
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model = "PHYTEC phyCORE-i.MX93";
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compatible = "phytec,imx93-phycore-som", "fsl,imx93";
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aliases {
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ethernet0 = &fec;
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};
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reserved-memory {
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ranges;
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#address-cells = <2>;
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#size-cells = <2>;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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alloc-ranges = <0 0x80000000 0 0x40000000>;
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size = <0 0x10000000>;
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linux,cma-default;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led-0 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_HEARTBEAT;
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gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_vdda_1v8: regulator-vdda-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VDDA_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&buck5>;
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};
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};
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/* ADC */
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&adc1 {
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vref-supply = <®_vdda_1v8>;
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};
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/* Ethernet */
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
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<&clk IMX93_CLK_ENET_REF>,
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<&clk IMX93_CLK_ENET_REF_PHY>;
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assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
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<&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
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<&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
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assigned-clock-rates = <100000000>, <50000000>, <50000000>;
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status = "okay";
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mdio: mdio {
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clock-frequency = <5000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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reset-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
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reset-assert-us = <30>;
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};
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};
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};
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/* I2C3 */
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&lpi2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpi2c3>;
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9451a";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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buck1: BUCK1 {
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regulator-name = "VDD_SOC";
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regulator-min-microvolt = <610000>;
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regulator-max-microvolt = <950000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck2: BUCK2 {
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regulator-name = "VDDQ_0V6";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <600000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck4: BUCK4 {
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regulator-name = "VDD_3V3_BUCK";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5: BUCK5 {
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regulator-name = "VDD_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6: BUCK6 {
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regulator-name = "VDD_1V1";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1: LDO1 {
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regulator-name = "PMIC_SNVS_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4: LDO4 {
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regulator-name = "VDD_0V8";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo5: LDO5 {
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regulator-name = "NVCC_SD2";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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/* EEPROM */
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eeprom@50 {
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compatible = "atmel,24c32";
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reg = <0x50>;
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pagesize = <32>;
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vcc-supply = <&buck4>;
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};
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};
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/* eMMC */
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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bus-width = <8>;
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non-removable;
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no-1-8-v;
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status = "okay";
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};
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/* Watchdog */
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&wdog3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX93_PAD_ENET2_MDC__ENET1_MDC 0x50e
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MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x502
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/* the three pins below are connected to PHYs straps,
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* that is what the pull-up/down setting is for.
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*/
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MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x37e
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MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x37e
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MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
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MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x50e
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MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x50e
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MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x50e
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MX93_PAD_ENET2_TD2__ENET1_TX_CLK 0x4000050e
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MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
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>;
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};
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pinctrl_leds: ledsgrp {
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fsl,pins = <
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MX93_PAD_I2C1_SDA__GPIO1_IO01 0x11e
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>;
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};
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pinctrl_lpi2c3: lpi2c3grp {
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fsl,pins = <
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MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
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MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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MX93_PAD_ENET2_RD3__GPIO4_IO27 0x31e
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e
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MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001386
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MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
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MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001386
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MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
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MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001386
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MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001386
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MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001386
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MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001386
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MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001386
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MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
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fsl,pins = <
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MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
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MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
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MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
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MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000139e
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MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
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MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000139e
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MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000139e
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MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000139e
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MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000139e
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MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000139e
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MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
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>;
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};
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/* need to config the SION for data and cmd pad, refer to ERR052021 */
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pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
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fsl,pins = <
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MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
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MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
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MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000139e
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MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013be
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MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
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MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013be
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MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013be
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MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013be
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MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013be
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MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013be
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MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e
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>;
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};
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};
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