755 lines
13 KiB
Plaintext
755 lines
13 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/* X1P42100 is heavily based on X1E80100, with some meaningful differences */
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#include "x1e80100.dtsi"
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/delete-node/ &bwmon_cluster0;
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/delete-node/ &cluster_pd2;
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/delete-node/ &cpu_map_cluster2;
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/delete-node/ &cpu8;
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/delete-node/ &cpu9;
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/delete-node/ &cpu10;
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/delete-node/ &cpu11;
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/delete-node/ &cpu_pd8;
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/delete-node/ &cpu_pd9;
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/delete-node/ &cpu_pd10;
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/delete-node/ &cpu_pd11;
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/delete-node/ &gpu_opp_table;
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/delete-node/ &gpu_speed_bin;
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/delete-node/ &pcie3_phy;
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/delete-node/ &thermal_zones;
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&gcc {
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compatible = "qcom,x1p42100-gcc", "qcom,x1e80100-gcc";
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};
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&gmu {
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compatible = "qcom,adreno-gmu-x145.0", "qcom,adreno-gmu";
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};
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&gpu {
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compatible = "qcom,adreno-43030c00", "qcom,adreno";
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nvmem-cells = <&gpu_speed_bin>;
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nvmem-cell-names = "speed_bin";
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gpu_opp_table: opp-table {
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compatible = "operating-points-v2-adreno", "operating-points-v2";
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opp-1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L4>;
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opp-peak-kBps = <16500000>;
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qcom,opp-acd-level = <0xa8295ffd>;
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opp-supported-hw = <0x3>;
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};
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opp-1250000000 {
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opp-hz = /bits/ 64 <1250000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L3>;
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opp-peak-kBps = <16500000>;
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qcom,opp-acd-level = <0x882a5ffd>;
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opp-supported-hw = <0x7>;
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};
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opp-1107000000 {
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opp-hz = /bits/ 64 <1107000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
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opp-peak-kBps = <16500000>;
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qcom,opp-acd-level = <0x882a5ffd>;
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opp-supported-hw = <0xf>;
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};
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opp-1014000000 {
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opp-hz = /bits/ 64 <1014000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
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opp-peak-kBps = <14398438>;
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qcom,opp-acd-level = <0xa82a5ffd>;
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opp-supported-hw = <0xf>;
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};
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opp-940000000 {
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opp-hz = /bits/ 64 <940000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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opp-peak-kBps = <14398438>;
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qcom,opp-acd-level = <0xa82a5ffd>;
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opp-supported-hw = <0xf>;
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};
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opp-825000000 {
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opp-hz = /bits/ 64 <825000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
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opp-peak-kBps = <12449219>;
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qcom,opp-acd-level = <0x882b5ffd>;
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opp-supported-hw = <0xf>;
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};
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opp-720000000 {
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opp-hz = /bits/ 64 <720000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
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opp-peak-kBps = <10687500>;
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qcom,opp-acd-level = <0xa82c5ffd>;
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opp-supported-hw = <0xf>;
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};
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opp-666000000-0 {
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opp-hz = /bits/ 64 <666000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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opp-peak-kBps = <8171875>;
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qcom,opp-acd-level = <0xa82d5ffd>;
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opp-supported-hw = <0xf>;
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};
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/* Only applicable for SKUs which has 666Mhz as Fmax */
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opp-666000000-1 {
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opp-hz = /bits/ 64 <666000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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opp-peak-kBps = <16500000>;
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qcom,opp-acd-level = <0xa82d5ffd>;
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opp-supported-hw = <0x10>;
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};
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opp-550000000 {
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opp-hz = /bits/ 64 <550000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
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opp-peak-kBps = <6074219>;
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qcom,opp-acd-level = <0x882e5ffd>;
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opp-supported-hw = <0x1f>;
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};
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opp-380000000 {
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opp-hz = /bits/ 64 <380000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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opp-peak-kBps = <3000000>;
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qcom,opp-acd-level = <0xc82f5ffd>;
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opp-supported-hw = <0x1f>;
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};
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opp-280000000 {
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opp-hz = /bits/ 64 <280000000>;
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opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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opp-peak-kBps = <2136719>;
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qcom,opp-acd-level = <0xc82f5ffd>;
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opp-supported-hw = <0x1f>;
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};
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};
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};
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&gpucc {
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compatible = "qcom,x1p42100-gpucc";
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};
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/* PCIe3 has half the lanes compared to X1E80100 */
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&pcie3 {
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num-lanes = <4>;
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};
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&pcie6a_phy {
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compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
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};
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&qfprom {
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gpu_speed_bin: gpu-speed-bin@119 {
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reg = <0x119 0x2>;
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bits = <7 9>;
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};
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};
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&soc {
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/* The PCIe3 PHY on X1P42100 uses a different IP block */
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pcie3_phy: phy@1bd4000 {
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compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
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reg = <0x0 0x01bd4000 0x0 0x2000>,
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<0x0 0x01bd6000 0x0 0x2000>;
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clocks = <&gcc GCC_PCIE_3_PHY_AUX_CLK>,
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<&gcc GCC_PCIE_3_CFG_AHB_CLK>,
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<&tcsr TCSR_PCIE_8L_CLKREF_EN>,
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<&gcc GCC_PCIE_3_PHY_RCHNG_CLK>,
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<&gcc GCC_PCIE_3_PIPE_CLK>,
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<&gcc GCC_PCIE_3_PIPEDIV2_CLK>;
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clock-names = "aux",
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"cfg_ahb",
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"ref",
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"rchng",
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"pipe",
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"pipediv2";
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resets = <&gcc GCC_PCIE_3_PHY_BCR>,
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<&gcc GCC_PCIE_3_NOCSR_COM_PHY_BCR>;
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reset-names = "phy",
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"phy_nocsr";
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assigned-clocks = <&gcc GCC_PCIE_3_PHY_RCHNG_CLK>;
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assigned-clock-rates = <100000000>;
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power-domains = <&gcc GCC_PCIE_3_PHY_GDSC>;
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#clock-cells = <0>;
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clock-output-names = "pcie3_pipe_clk";
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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/* While physically present, this controller is left unconfigured and unused */
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&tsens3 {
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status = "disabled";
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};
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/ {
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thermal-zones {
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aoss0-thermal {
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thermal-sensors = <&tsens0 0>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-0-top-thermal {
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thermal-sensors = <&tsens0 1>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-0-btm-thermal {
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thermal-sensors = <&tsens0 2>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-1-top-thermal {
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thermal-sensors = <&tsens0 3>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-1-btm-thermal {
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thermal-sensors = <&tsens0 4>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-2-top-thermal {
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thermal-sensors = <&tsens0 5>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-2-btm-thermal {
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thermal-sensors = <&tsens0 6>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-3-top-thermal {
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thermal-sensors = <&tsens0 7>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu0-3-btm-thermal {
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thermal-sensors = <&tsens0 8>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpuss0-top-thermal {
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thermal-sensors = <&tsens0 9>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpuss0-btm-thermal {
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thermal-sensors = <&tsens0 10>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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mem-thermal {
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thermal-sensors = <&tsens0 11>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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video-thermal {
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thermal-sensors = <&tsens0 12>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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aoss1-thermal {
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thermal-sensors = <&tsens1 0>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-0-top-thermal {
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thermal-sensors = <&tsens1 1>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-0-btm-thermal {
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thermal-sensors = <&tsens1 2>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-1-top-thermal {
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thermal-sensors = <&tsens1 3>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-1-btm-thermal {
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thermal-sensors = <&tsens1 4>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-2-top-thermal {
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thermal-sensors = <&tsens1 5>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-2-btm-thermal {
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thermal-sensors = <&tsens1 6>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-3-top-thermal {
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thermal-sensors = <&tsens1 7>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpu1-3-btm-thermal {
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thermal-sensors = <&tsens1 8>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpuss1-top-thermal {
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thermal-sensors = <&tsens1 9>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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cpuss1-btm-thermal {
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thermal-sensors = <&tsens1 10>;
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trips {
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trip-point0 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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aoss2-thermal {
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thermal-sensors = <&tsens2 0>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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nsp0-thermal {
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thermal-sensors = <&tsens2 1>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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nsp1-thermal {
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thermal-sensors = <&tsens2 2>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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nsp2-thermal {
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thermal-sensors = <&tsens2 3>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
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};
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};
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nsp3-thermal {
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thermal-sensors = <&tsens2 4>;
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trips {
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trip-point0 {
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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trip-point1 {
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temperature = <115000>;
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hysteresis = <1000>;
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type = "critical";
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};
|
|
};
|
|
};
|
|
|
|
gpuss-0-thermal {
|
|
polling-delay-passive = <200>;
|
|
|
|
thermal-sensors = <&tsens2 5>;
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&gpuss0_alert0>;
|
|
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
trips {
|
|
gpuss0_alert0: trip-point0 {
|
|
temperature = <95000>;
|
|
hysteresis = <1000>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
gpuss-1-thermal {
|
|
polling-delay-passive = <200>;
|
|
|
|
thermal-sensors = <&tsens2 6>;
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&gpuss1_alert0>;
|
|
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
trips {
|
|
gpuss1_alert0: trip-point0 {
|
|
temperature = <95000>;
|
|
hysteresis = <1000>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
gpuss-2-thermal {
|
|
polling-delay-passive = <200>;
|
|
|
|
thermal-sensors = <&tsens2 7>;
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&gpuss2_alert0>;
|
|
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
trips {
|
|
gpuss2_alert0: trip-point0 {
|
|
temperature = <95000>;
|
|
hysteresis = <1000>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
gpuss-3-thermal {
|
|
polling-delay-passive = <200>;
|
|
|
|
thermal-sensors = <&tsens2 8>;
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&gpuss3_alert0>;
|
|
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
|
|
trips {
|
|
gpuss3_alert0: trip-point0 {
|
|
temperature = <95000>;
|
|
hysteresis = <1000>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
camera0-thermal {
|
|
thermal-sensors = <&tsens2 9>;
|
|
|
|
trips {
|
|
trip-point0 {
|
|
temperature = <90000>;
|
|
hysteresis = <2000>;
|
|
type = "hot";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
camera1-thermal {
|
|
thermal-sensors = <&tsens2 10>;
|
|
|
|
trips {
|
|
trip-point0 {
|
|
temperature = <90000>;
|
|
hysteresis = <2000>;
|
|
type = "hot";
|
|
};
|
|
|
|
trip-point1 {
|
|
temperature = <115000>;
|
|
hysteresis = <1000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|