37 lines
865 B
Plaintext
37 lines
865 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
/*
|
|
* Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
|
|
* Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
|
|
*/
|
|
|
|
/ {
|
|
cpus: cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
timebase-frequency = <25000000>;
|
|
|
|
cpu0: cpu@0 {
|
|
compatible = "thead,c906", "riscv";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
d-cache-block-size = <64>;
|
|
d-cache-sets = <512>;
|
|
d-cache-size = <65536>;
|
|
i-cache-block-size = <64>;
|
|
i-cache-sets = <128>;
|
|
i-cache-size = <32768>;
|
|
mmu-type = "riscv,sv39";
|
|
riscv,isa = "rv64imafdc";
|
|
riscv,isa-base = "rv64i";
|
|
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
|
|
"zifencei", "zihpm";
|
|
|
|
cpu0_intc: interrupt-controller {
|
|
compatible = "riscv,cpu-intc";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
};
|
|
};
|
|
};
|