76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved
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*/
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#include <drm/drm_managed.h>
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#include "dpu_hw_cwb.h"
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#include <linux/bitfield.h>
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#define CWB_MUX 0x000
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#define CWB_MODE 0x004
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/* CWB mux block bit definitions */
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#define CWB_MUX_MASK GENMASK(3, 0)
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#define CWB_MODE_MASK GENMASK(2, 0)
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static void dpu_hw_cwb_config(struct dpu_hw_cwb *ctx,
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struct dpu_hw_cwb_setup_cfg *cwb_cfg)
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{
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struct dpu_hw_blk_reg_map *c = &ctx->hw;
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int cwb_mux_cfg = 0xF;
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enum dpu_pingpong pp;
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enum cwb_mode_input input;
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if (!cwb_cfg)
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return;
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input = cwb_cfg->input;
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pp = cwb_cfg->pp_idx;
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if (input >= INPUT_MODE_MAX)
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return;
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/*
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* The CWB_MUX register takes the pingpong index for the real-time
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* display
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*/
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if ((pp != PINGPONG_NONE) && (pp < PINGPONG_MAX))
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cwb_mux_cfg = FIELD_PREP(CWB_MUX_MASK, pp - PINGPONG_0);
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input = FIELD_PREP(CWB_MODE_MASK, input);
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DPU_REG_WRITE(c, CWB_MUX, cwb_mux_cfg);
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DPU_REG_WRITE(c, CWB_MODE, input);
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}
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/**
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* dpu_hw_cwb_init() - Initializes the writeback hw driver object with cwb.
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* @dev: Corresponding device for devres management
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* @cfg: wb_path catalog entry for which driver object is required
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* @addr: mapped register io address of MDP
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* Return: Error code or allocated dpu_hw_wb context
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*/
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struct dpu_hw_cwb *dpu_hw_cwb_init(struct drm_device *dev,
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const struct dpu_cwb_cfg *cfg,
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void __iomem *addr)
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{
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struct dpu_hw_cwb *c;
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if (!addr)
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return ERR_PTR(-EINVAL);
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c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
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if (!c)
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return ERR_PTR(-ENOMEM);
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c->hw.blk_addr = addr + cfg->base;
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c->hw.log_mask = DPU_DBG_MASK_CWB;
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c->idx = cfg->id;
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c->ops.config_cwb = dpu_hw_cwb_config;
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return c;
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}
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