157 lines
3.6 KiB
C
157 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */
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#ifndef _HINIC3_CMDQ_H_
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#define _HINIC3_CMDQ_H_
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#include <linux/dmapool.h>
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#include "hinic3_hw_intf.h"
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#include "hinic3_wq.h"
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#define CMDQ_DEPTH 4096
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struct cmdq_db {
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__le32 db_head;
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__le32 db_info;
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};
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/* hw defined cmdq wqe header */
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struct cmdq_header {
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__le32 header_info;
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__le32 saved_data;
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};
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struct cmdq_lcmd_bufdesc {
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struct hinic3_sge sge;
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__le64 rsvd2;
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__le64 rsvd3;
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};
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struct cmdq_status {
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__le32 status_info;
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};
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struct cmdq_ctrl {
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__le32 ctrl_info;
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};
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struct cmdq_direct_resp {
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__le64 val;
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__le64 rsvd;
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};
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struct cmdq_completion {
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union {
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struct hinic3_sge sge;
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struct cmdq_direct_resp direct;
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} resp;
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};
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struct cmdq_wqe_scmd {
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struct cmdq_header header;
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__le64 rsvd3;
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struct cmdq_status status;
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struct cmdq_ctrl ctrl;
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struct cmdq_completion completion;
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__le32 rsvd10[6];
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};
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struct cmdq_wqe_lcmd {
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struct cmdq_header header;
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struct cmdq_status status;
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struct cmdq_ctrl ctrl;
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struct cmdq_completion completion;
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struct cmdq_lcmd_bufdesc buf_desc;
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};
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struct cmdq_wqe {
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union {
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struct cmdq_wqe_scmd wqe_scmd;
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struct cmdq_wqe_lcmd wqe_lcmd;
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};
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};
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static_assert(sizeof(struct cmdq_wqe) == 64);
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enum hinic3_cmdq_type {
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HINIC3_CMDQ_SYNC = 0,
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HINIC3_MAX_CMDQ_TYPES = 4
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};
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enum hinic3_cmdq_status {
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HINIC3_CMDQ_ENABLE = BIT(0),
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};
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enum hinic3_cmdq_cmd_type {
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HINIC3_CMD_TYPE_NONE,
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HINIC3_CMD_TYPE_DIRECT_RESP,
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HINIC3_CMD_TYPE_FAKE_TIMEOUT,
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HINIC3_CMD_TYPE_TIMEOUT,
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HINIC3_CMD_TYPE_FORCE_STOP,
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};
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struct hinic3_cmd_buf {
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void *buf;
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dma_addr_t dma_addr;
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__le16 size;
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refcount_t ref_cnt;
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};
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struct hinic3_cmdq_cmd_info {
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enum hinic3_cmdq_cmd_type cmd_type;
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struct completion *done;
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int *errcode;
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/* completion code */
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int *cmpt_code;
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__le64 *direct_resp;
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u64 cmdq_msg_id;
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struct hinic3_cmd_buf *buf_in;
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};
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struct hinic3_cmdq {
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struct hinic3_wq wq;
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enum hinic3_cmdq_type cmdq_type;
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u8 wrapped;
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/* synchronize command submission with completions via event queue */
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spinlock_t cmdq_lock;
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struct hinic3_cmdq_cmd_info *cmd_infos;
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struct hinic3_hwdev *hwdev;
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};
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struct hinic3_cmdqs {
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struct hinic3_hwdev *hwdev;
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struct hinic3_cmdq cmdq[HINIC3_MAX_CMDQ_TYPES];
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struct dma_pool *cmd_buf_pool;
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/* doorbell area */
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u8 __iomem *cmdqs_db_base;
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/* When command queue uses multiple memory pages (1-level CLA), this
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* block will hold aggregated indirection table for all command queues
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* of cmdqs. Not used for small cmdq (0-level CLA).
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*/
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dma_addr_t wq_block_paddr;
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void *wq_block_vaddr;
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u32 status;
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u32 disable_flag;
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u8 cmdq_num;
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};
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int hinic3_cmdqs_init(struct hinic3_hwdev *hwdev);
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void hinic3_cmdqs_free(struct hinic3_hwdev *hwdev);
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struct hinic3_cmd_buf *hinic3_alloc_cmd_buf(struct hinic3_hwdev *hwdev);
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void hinic3_free_cmd_buf(struct hinic3_hwdev *hwdev,
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struct hinic3_cmd_buf *cmd_buf);
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void hinic3_cmdq_ceq_handler(struct hinic3_hwdev *hwdev, __le32 ceqe_data);
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int hinic3_cmdq_direct_resp(struct hinic3_hwdev *hwdev, u8 mod, u8 cmd,
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struct hinic3_cmd_buf *buf_in, __le64 *out_param);
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void hinic3_cmdq_flush_sync_cmd(struct hinic3_hwdev *hwdev);
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int hinic3_reinit_cmdq_ctxts(struct hinic3_hwdev *hwdev);
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bool hinic3_cmdq_idle(struct hinic3_cmdq *cmdq);
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#endif
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