55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */
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#ifndef _HINIC3_COMMON_H_
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#define _HINIC3_COMMON_H_
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#include <linux/device.h>
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#define HINIC3_MIN_PAGE_SIZE 0x1000
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struct hinic3_dma_addr_align {
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u32 real_size;
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void *ori_vaddr;
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dma_addr_t ori_paddr;
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void *align_vaddr;
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dma_addr_t align_paddr;
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};
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enum hinic3_wait_return {
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HINIC3_WAIT_PROCESS_CPL = 0,
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HINIC3_WAIT_PROCESS_WAITING = 1,
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};
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struct hinic3_sge {
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__le32 hi_addr;
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__le32 lo_addr;
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__le32 len;
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__le32 rsvd;
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};
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static inline void hinic3_set_sge(struct hinic3_sge *sge, dma_addr_t addr,
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__le32 len)
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{
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sge->hi_addr = cpu_to_le32(upper_32_bits(addr));
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sge->lo_addr = cpu_to_le32(lower_32_bits(addr));
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sge->len = len;
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sge->rsvd = 0;
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}
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int hinic3_dma_zalloc_coherent_align(struct device *dev, u32 size, u32 align,
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gfp_t flag,
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struct hinic3_dma_addr_align *mem_align);
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void hinic3_dma_free_coherent_align(struct device *dev,
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struct hinic3_dma_addr_align *mem_align);
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typedef enum hinic3_wait_return (*wait_cpl_handler)(void *priv_data);
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int hinic3_wait_for_timeout(void *priv_data, wait_cpl_handler handler,
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u32 wait_total_ms, u32 wait_once_us);
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void hinic3_cmdq_buf_swab32(void *data, int len);
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#endif
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