94 lines
2.9 KiB
C
94 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Header for Broadcom brcmstb GPIO based drivers
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*
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* Copyright (C) 2024-2025 Ivan T. Ivanov, Andrea della Porta
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* Copyright (C) 2021-3 Raspberry Pi Ltd.
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* Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
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*
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* Based heavily on the BCM2835 GPIO & pinctrl driver, which was inspired by:
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* pinctrl-nomadik.c, please see original file for copyright information
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* pinctrl-tegra.c, please see original file for copyright information
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*/
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#ifndef __PINCTRL_BRCMSTB_H__
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#define __PINCTRL_BRCMSTB_H__
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#define BRCMSTB_FUNC(f) \
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[func_##f] = #f
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#define MUX_BIT_VALID 0x8000
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#define PAD_BIT_INVALID 0xffff
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#define MUX_BIT(muxreg, muxshift) \
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(MUX_BIT_VALID + ((muxreg) << 5) + ((muxshift) << 2))
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#define PAD_BIT(padreg, padshift) \
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(((padreg) << 5) + ((padshift) << 1))
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#define GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
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[n] = { MUX_BIT(muxreg, muxshift), PAD_BIT(padreg, padshift) }
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#define EMMC_REGS(n, padreg, padshift) \
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[n] = { 0, PAD_BIT(padreg, padshift) }
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#define AON_GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
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GPIO_REGS(n, muxreg, muxshift, padreg, padshift)
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#define AON_SGPIO_REGS(n, muxreg, muxshift) \
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[(n) + 32] = { MUX_BIT(muxreg, muxshift), PAD_BIT_INVALID }
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#define GPIO_PIN(n) PINCTRL_PIN(n, "gpio" #n)
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/**
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* AON pins are in the Always-On power domain. SGPIOs are also 'Safe'
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* being 5V tolerant (necessary for the HDMI I2C pins), and can be driven
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* while the power is off.
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*/
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#define AON_GPIO_PIN(n) PINCTRL_PIN(n, "aon_gpio" #n)
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#define AON_SGPIO_PIN(n) PINCTRL_PIN((n) + 32, "aon_sgpio" #n)
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struct pin_regs {
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u16 mux_bit;
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u16 pad_bit;
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};
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/**
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* struct brcmstb_pin_funcs - pins provide their primary/alternate
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* functions in this struct
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* @func_mask: mask representing valid bits of the function selector
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* in the registers
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* @funcs: array of function identifiers
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* @n_funcs: number of identifiers of the @funcs array above
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*/
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struct brcmstb_pin_funcs {
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const u32 func_mask;
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const u8 *funcs;
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const unsigned int n_funcs;
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};
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/**
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* struct brcmstb_pdata - specific data for a pinctrl chip implementation
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* @pctl_desc: pin controller descriptor for this implementation
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* @gpio_range: range of GPIOs served by this controller
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* @pin_regs: array of register descriptors for each pin
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* @pin_funcs: array of all possible assignable function for each pin
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* @func_count: total number of functions
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* @func_gpio: which function number is GPIO (usually 0)
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* @func_names: an array listing all function names
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*/
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struct brcmstb_pdata {
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const struct pinctrl_desc *pctl_desc;
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const struct pinctrl_gpio_range *gpio_range;
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const struct pin_regs *pin_regs;
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const struct brcmstb_pin_funcs *pin_funcs;
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const unsigned int func_count;
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const unsigned int func_gpio;
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const char * const *func_names;
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};
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int brcmstb_pinctrl_probe(struct platform_device *pdev);
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#endif
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