81 lines
2.3 KiB
C
81 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2023, Tencent, Inc.
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*/
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#include <stdint.h>
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#include <linux/kernel.h>
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#include "kvm_util.h"
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#include "processor.h"
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#include "pmu.h"
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const uint64_t intel_pmu_arch_events[] = {
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INTEL_ARCH_CPU_CYCLES,
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INTEL_ARCH_INSTRUCTIONS_RETIRED,
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INTEL_ARCH_REFERENCE_CYCLES,
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INTEL_ARCH_LLC_REFERENCES,
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INTEL_ARCH_LLC_MISSES,
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INTEL_ARCH_BRANCHES_RETIRED,
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INTEL_ARCH_BRANCHES_MISPREDICTED,
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INTEL_ARCH_TOPDOWN_SLOTS,
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INTEL_ARCH_TOPDOWN_BE_BOUND,
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INTEL_ARCH_TOPDOWN_BAD_SPEC,
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INTEL_ARCH_TOPDOWN_FE_BOUND,
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INTEL_ARCH_TOPDOWN_RETIRING,
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INTEL_ARCH_LBR_INSERTS,
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};
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kvm_static_assert(ARRAY_SIZE(intel_pmu_arch_events) == NR_INTEL_ARCH_EVENTS);
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const uint64_t amd_pmu_zen_events[] = {
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AMD_ZEN_CORE_CYCLES,
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AMD_ZEN_INSTRUCTIONS_RETIRED,
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AMD_ZEN_BRANCHES_RETIRED,
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AMD_ZEN_BRANCHES_MISPREDICTED,
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};
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kvm_static_assert(ARRAY_SIZE(amd_pmu_zen_events) == NR_AMD_ZEN_EVENTS);
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/*
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* For Intel Atom CPUs, the PMU events "Instruction Retired" or
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* "Branch Instruction Retired" may be overcounted for some certain
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* instructions, like FAR CALL/JMP, RETF, IRET, VMENTRY/VMEXIT/VMPTRLD
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* and complex SGX/SMX/CSTATE instructions/flows.
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*
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* The detailed information can be found in the errata (section SRF7):
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* https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/sierra-forest/xeon-6700-series-processor-with-e-cores-specification-update/errata-details/
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*
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* For the Atom platforms before Sierra Forest (including Sierra Forest),
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* Both 2 events "Instruction Retired" and "Branch Instruction Retired" would
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* be overcounted on these certain instructions, but for Clearwater Forest
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* only "Instruction Retired" event is overcounted on these instructions.
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*/
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static uint64_t get_pmu_errata(void)
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{
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if (!this_cpu_is_intel())
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return 0;
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if (this_cpu_family() != 0x6)
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return 0;
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switch (this_cpu_model()) {
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case 0xDD: /* Clearwater Forest */
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return BIT_ULL(INSTRUCTIONS_RETIRED_OVERCOUNT);
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case 0xAF: /* Sierra Forest */
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case 0x4D: /* Avaton, Rangely */
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case 0x5F: /* Denverton */
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case 0x86: /* Jacobsville */
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return BIT_ULL(INSTRUCTIONS_RETIRED_OVERCOUNT) |
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BIT_ULL(BRANCHES_RETIRED_OVERCOUNT);
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default:
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return 0;
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}
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}
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uint64_t pmu_errata_mask;
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void kvm_init_pmu_errata(void)
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{
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pmu_errata_mask = get_pmu_errata();
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}
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