74 lines
4.8 KiB
C
74 lines
4.8 KiB
C
/**
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* \file
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*
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* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Subject to your compliance with these terms, you may use Microchip
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* software and any derivatives exclusively with Microchip products.
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* It is your responsibility to comply with third party license terms applicable
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* to your use of third party software (including open source software) that
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* may accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
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* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
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* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
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* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
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* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
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* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
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* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
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*/
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#ifndef _SAME70_ICM_INSTANCE_
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#define _SAME70_ICM_INSTANCE_
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/* ========== Register definition for ICM peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_ICM_CFG (0x40048000U) /**< \brief (ICM) Configuration Register */
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#define REG_ICM_CTRL (0x40048004U) /**< \brief (ICM) Control Register */
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#define REG_ICM_SR (0x40048008U) /**< \brief (ICM) Status Register */
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#define REG_ICM_IER (0x40048010U) /**< \brief (ICM) Interrupt Enable Register */
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#define REG_ICM_IDR (0x40048014U) /**< \brief (ICM) Interrupt Disable Register */
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#define REG_ICM_IMR (0x40048018U) /**< \brief (ICM) Interrupt Mask Register */
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#define REG_ICM_ISR (0x4004801CU) /**< \brief (ICM) Interrupt Status Register */
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#define REG_ICM_UASR (0x40048020U) /**< \brief (ICM) Undefined Access Status Register */
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#define REG_ICM_DSCR (0x40048030U) /**< \brief (ICM) Region Descriptor Area Start Address Register */
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#define REG_ICM_HASH (0x40048034U) /**< \brief (ICM) Region Hash Area Start Address Register */
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#define REG_ICM_UIHVAL (0x40048038U) /**< \brief (ICM) User Initial Hash Value 0 Register */
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#define REG_ICM_ADDRSIZE (0x400480ECU) /**< \brief (ICM) Address Size Register */
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#define REG_ICM_IPNAME (0x400480F0U) /**< \brief (ICM) IP Name 1 Register */
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#define REG_ICM_FEATURES (0x400480F8U) /**< \brief (ICM) Feature Register */
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#define REG_ICM_VERSION (0x400480FCU) /**< \brief (ICM) Version Register */
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#else
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#define REG_ICM_CFG (*(__IO uint32_t*)0x40048000U) /**< \brief (ICM) Configuration Register */
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#define REG_ICM_CTRL (*(__O uint32_t*)0x40048004U) /**< \brief (ICM) Control Register */
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#define REG_ICM_SR (*(__I uint32_t*)0x40048008U) /**< \brief (ICM) Status Register */
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#define REG_ICM_IER (*(__O uint32_t*)0x40048010U) /**< \brief (ICM) Interrupt Enable Register */
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#define REG_ICM_IDR (*(__O uint32_t*)0x40048014U) /**< \brief (ICM) Interrupt Disable Register */
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#define REG_ICM_IMR (*(__I uint32_t*)0x40048018U) /**< \brief (ICM) Interrupt Mask Register */
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#define REG_ICM_ISR (*(__I uint32_t*)0x4004801CU) /**< \brief (ICM) Interrupt Status Register */
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#define REG_ICM_UASR (*(__I uint32_t*)0x40048020U) /**< \brief (ICM) Undefined Access Status Register */
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#define REG_ICM_DSCR (*(__IO uint32_t*)0x40048030U) /**< \brief (ICM) Region Descriptor Area Start Address Register */
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#define REG_ICM_HASH (*(__IO uint32_t*)0x40048034U) /**< \brief (ICM) Region Hash Area Start Address Register */
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#define REG_ICM_UIHVAL (*(__O uint32_t*)0x40048038U) /**< \brief (ICM) User Initial Hash Value 0 Register */
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#define REG_ICM_ADDRSIZE (*(__I uint32_t*)0x400480ECU) /**< \brief (ICM) Address Size Register */
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#define REG_ICM_IPNAME (*(__I uint32_t*)0x400480F0U) /**< \brief (ICM) IP Name 1 Register */
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#define REG_ICM_FEATURES (*(__I uint32_t*)0x400480F8U) /**< \brief (ICM) Feature Register */
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#define REG_ICM_VERSION (*(__I uint32_t*)0x400480FCU) /**< \brief (ICM) Version Register */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAME70_ICM_INSTANCE_ */
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