135 lines
5.8 KiB
C
135 lines
5.8 KiB
C
/**
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* \file
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*
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* \brief Instance description for EVSYS
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*
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* Copyright (c) 2018 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAMD11_EVSYS_INSTANCE_
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#define _SAMD11_EVSYS_INSTANCE_
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/* ========== Register definition for EVSYS peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_EVSYS_CTRL (0x42000400) /**< \brief (EVSYS) Control */
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#define REG_EVSYS_CHANNEL (0x42000404) /**< \brief (EVSYS) Channel */
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#define REG_EVSYS_USER (0x42000408) /**< \brief (EVSYS) User Multiplexer */
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#define REG_EVSYS_CHSTATUS (0x4200040C) /**< \brief (EVSYS) Channel Status */
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#define REG_EVSYS_INTENCLR (0x42000410) /**< \brief (EVSYS) Interrupt Enable Clear */
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#define REG_EVSYS_INTENSET (0x42000414) /**< \brief (EVSYS) Interrupt Enable Set */
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#define REG_EVSYS_INTFLAG (0x42000418) /**< \brief (EVSYS) Interrupt Flag Status and Clear */
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#else
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#define REG_EVSYS_CTRL (*(WoReg8 *)0x42000400UL) /**< \brief (EVSYS) Control */
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#define REG_EVSYS_CHANNEL (*(RwReg *)0x42000404UL) /**< \brief (EVSYS) Channel */
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#define REG_EVSYS_USER (*(RwReg16*)0x42000408UL) /**< \brief (EVSYS) User Multiplexer */
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#define REG_EVSYS_CHSTATUS (*(RoReg *)0x4200040CUL) /**< \brief (EVSYS) Channel Status */
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#define REG_EVSYS_INTENCLR (*(RwReg *)0x42000410UL) /**< \brief (EVSYS) Interrupt Enable Clear */
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#define REG_EVSYS_INTENSET (*(RwReg *)0x42000414UL) /**< \brief (EVSYS) Interrupt Enable Set */
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#define REG_EVSYS_INTFLAG (*(RwReg *)0x42000418UL) /**< \brief (EVSYS) Interrupt Flag Status and Clear */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for EVSYS peripheral ========== */
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#define EVSYS_CHANNELS 6 // Number of Channels
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#define EVSYS_CHANNELS_BITS 3 // Number of bits to select Channel
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#define EVSYS_CHANNELS_MSB 5 // Number of Channels - 1
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#define EVSYS_EXTEVT_NUM 0 // Number of External Event Generators
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#define EVSYS_GCLK_ID_0 7
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#define EVSYS_GCLK_ID_1 8
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#define EVSYS_GCLK_ID_2 9
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#define EVSYS_GCLK_ID_3 10
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#define EVSYS_GCLK_ID_4 11
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#define EVSYS_GCLK_ID_5 12
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#define EVSYS_GCLK_ID_LSB 7
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#define EVSYS_GCLK_ID_MSB 12
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#define EVSYS_GCLK_ID_SIZE 6
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#define EVSYS_GENERATORS 44 // Total Number of Event Generators
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#define EVSYS_GENERATORS_BITS 6 // Number of bits to select Event Generator
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#define EVSYS_USERS 18 // Total Number of Event Users
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#define EVSYS_USERS_BITS 5 // Number of bits to select Event User
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// GENERATORS
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#define EVSYS_ID_GEN_RTC_CMP_0 1
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#define EVSYS_ID_GEN_RTC_CMP_1 2
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#define EVSYS_ID_GEN_RTC_OVF 3
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#define EVSYS_ID_GEN_RTC_PER_0 4
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#define EVSYS_ID_GEN_RTC_PER_1 5
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#define EVSYS_ID_GEN_RTC_PER_2 6
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#define EVSYS_ID_GEN_RTC_PER_3 7
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#define EVSYS_ID_GEN_RTC_PER_4 8
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#define EVSYS_ID_GEN_RTC_PER_5 9
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#define EVSYS_ID_GEN_RTC_PER_6 10
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#define EVSYS_ID_GEN_RTC_PER_7 11
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#define EVSYS_ID_GEN_EIC_EXTINT_0 12
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#define EVSYS_ID_GEN_EIC_EXTINT_1 13
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#define EVSYS_ID_GEN_EIC_EXTINT_2 14
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#define EVSYS_ID_GEN_EIC_EXTINT_3 15
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#define EVSYS_ID_GEN_EIC_EXTINT_4 16
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#define EVSYS_ID_GEN_EIC_EXTINT_5 17
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#define EVSYS_ID_GEN_EIC_EXTINT_6 18
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#define EVSYS_ID_GEN_EIC_EXTINT_7 19
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#define EVSYS_ID_GEN_DMAC_CH_0 20
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#define EVSYS_ID_GEN_DMAC_CH_1 21
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#define EVSYS_ID_GEN_DMAC_CH_2 22
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#define EVSYS_ID_GEN_DMAC_CH_3 23
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#define EVSYS_ID_GEN_TCC0_OVF 24
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#define EVSYS_ID_GEN_TCC0_TRG 25
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#define EVSYS_ID_GEN_TCC0_CNT 26
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#define EVSYS_ID_GEN_TCC0_MCX_0 27
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#define EVSYS_ID_GEN_TCC0_MCX_1 28
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#define EVSYS_ID_GEN_TCC0_MCX_2 29
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#define EVSYS_ID_GEN_TCC0_MCX_3 30
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#define EVSYS_ID_GEN_TC1_OVF 31
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#define EVSYS_ID_GEN_TC1_MCX_0 32
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#define EVSYS_ID_GEN_TC1_MCX_1 33
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#define EVSYS_ID_GEN_TC2_OVF 34
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#define EVSYS_ID_GEN_TC2_MCX_0 35
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#define EVSYS_ID_GEN_TC2_MCX_1 36
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#define EVSYS_ID_GEN_ADC_RESRDY 37
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#define EVSYS_ID_GEN_ADC_WINMON 38
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#define EVSYS_ID_GEN_AC_COMP_0 39
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#define EVSYS_ID_GEN_AC_COMP_1 40
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#define EVSYS_ID_GEN_AC_WIN_0 41
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#define EVSYS_ID_GEN_DAC_EMPTY 42
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// USERS
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#define EVSYS_ID_USER_DMAC_CH_0 0
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#define EVSYS_ID_USER_DMAC_CH_1 1
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#define EVSYS_ID_USER_DMAC_CH_2 2
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#define EVSYS_ID_USER_DMAC_CH_3 3
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#define EVSYS_ID_USER_TCC0_EV_0 4
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#define EVSYS_ID_USER_TCC0_EV_1 5
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#define EVSYS_ID_USER_TCC0_MC_0 6
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#define EVSYS_ID_USER_TCC0_MC_1 7
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#define EVSYS_ID_USER_TCC0_MC_2 8
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#define EVSYS_ID_USER_TCC0_MC_3 9
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#define EVSYS_ID_USER_TC1_EVU 10
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#define EVSYS_ID_USER_TC2_EVU 11
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#define EVSYS_ID_USER_ADC_START 12
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#define EVSYS_ID_USER_ADC_SYNC 13
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#define EVSYS_ID_USER_AC_SOC_0 14
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#define EVSYS_ID_USER_AC_SOC_1 15
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#define EVSYS_ID_USER_DAC_START 16
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#endif /* _SAMD11_EVSYS_INSTANCE_ */
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