jzh/lark1s_demo
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[feat] first complete

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This commit is contained in:
zhji 2024-07-14 21:27:23 +08:00
parent 9261aaa842
commit 9333988e74
5 changed files with 101 additions and 24 deletions
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2
stm32f4/main.c
View File

@ -31,7 +31,7 @@ void system_init(void)
led_init(); led_init();
system_tick_init(); system_tick_init();
// lcd_init(); // lcd_init();
// rs485_init(); rs485_init();
dwin_init(); dwin_init();
} }

64
stm32f4/src/dwin.c
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@ -109,22 +109,44 @@ static void dwin_endian_reverse_2byte(uint8_t *buffer, uint16_t val)
void dwin_rx_parse(uint8_t *buffer, uint16_t len) void dwin_rx_parse(uint8_t *buffer, uint16_t len)
{ {
uint32_t baudrate; uint32_t u32;
uint8_t *p = buffer; uint8_t *p = buffer;
if (p[0] != 0x5A || p[1] != 0xA5 || p[2] != 0x12 || p[3] != 0x83 || p[4] != 0x51 || p[5] != 0x00 || p[6] != 0x07) {
sm++;
if (sm > 1) {
sm = 0;
}
return;
}
rs485_cfg_dwin.address = p[16];
u32 = (uint32_t)p[20];
u32 |= (uint32_t)p[19] << 8;
u32 |= (uint32_t)p[18] << 16;
u32 |= (uint32_t)p[17] << 24;
rs485_cfg_dwin.baudrate = u32;
u32 = (uint32_t)p[14];
u32 |= (uint32_t)p[13] << 8;
u32 |= (uint32_t)p[12] << 16;
u32 |= (uint32_t)p[11] << 24;
rs485_cfg_dwin.concentration = u32;
rs485_cfg_dwin.restore = p[10];
rs485_cfg_dwin.cali = p[8];
if (rs485_cfg_dwin.restore) {
rs485_cfg_dwin.restore_bak = 1;
sm = 2;
return;
}
if (rs485_cfg_dwin.cali) {
rs485_cfg_dwin.cali_bak = 1;
sm = 3;
return;
}
sm++; sm++;
if (sm > 1) { if (sm > 1) {
sm = 0; sm = 0;
} }
if (p[0] != 0x5A || p[1] != 0xA5 || p[2] != 0x12 || p[3] != 0x83 || p[4] != 0x51 || p[5] != 0x00 || p[6] != 0x07) {
return;
}
rs485_mb_addr = p[16];
baudrate = (uint32_t)p[20];
baudrate |= (uint32_t)p[19] << 8;
baudrate |= (uint32_t)p[18] << 16;
baudrate |= (uint32_t)p[17] << 24;
rs485_baudrate = baudrate;
} }
void dwin_loop(void) void dwin_loop(void)
@ -147,7 +169,7 @@ void dwin_loop(void)
dwin_buff_tx[len++] = (DWIN_DATA_CTRL_ADDR >> 8) & 0xFF; /* address high byte */ dwin_buff_tx[len++] = (DWIN_DATA_CTRL_ADDR >> 8) & 0xFF; /* address high byte */
dwin_buff_tx[len++] = DWIN_DATA_CTRL_ADDR & 0xFF; /* address low byte */ dwin_buff_tx[len++] = DWIN_DATA_CTRL_ADDR & 0xFF; /* address low byte */
dwin_buff_tx[len++] = DWIN_DATA_CTRL_LENG; /* data length to be read */ dwin_buff_tx[len++] = DWIN_DATA_CTRL_LENG; /* data length to be read */
} else { } else if (sm == 1) {
/* write display data */ /* write display data */
dwin_buff_tx[len++] = 0x5A; dwin_buff_tx[len++] = 0x5A;
dwin_buff_tx[len++] = 0xA5; /* frame head */ dwin_buff_tx[len++] = 0xA5; /* frame head */
@ -241,6 +263,26 @@ void dwin_loop(void)
len += 4; len += 4;
dwin_endian_reverse_4byte(dwin_buff_tx + len, lark1s_gas_cali_data.span_ref_cts); dwin_endian_reverse_4byte(dwin_buff_tx + len, lark1s_gas_cali_data.span_ref_cts);
len += 4; len += 4;
} else if (sm == 2) {
/* clear restore request data */
dwin_buff_tx[len++] = 0x5A;
dwin_buff_tx[len++] = 0xA5; /* frame head */
dwin_buff_tx[len++] = 0x05; /* length */
dwin_buff_tx[len++] = 0x82; /* write operation */
dwin_buff_tx[len++] = ((DWIN_DATA_CTRL_ADDR + 1) >> 8) & 0xFF; /* address high byte */
dwin_buff_tx[len++] = (DWIN_DATA_CTRL_ADDR + 1) & 0xFF; /* address low byte */
dwin_buff_tx[len++] = 0x00; /* data */
dwin_buff_tx[len++] = 0x00; /* data */
} else if (sm == 3) {
/* clear restore request data */
dwin_buff_tx[len++] = 0x5A;
dwin_buff_tx[len++] = 0xA5; /* frame head */
dwin_buff_tx[len++] = 0x05; /* length */
dwin_buff_tx[len++] = 0x82; /* write operation */
dwin_buff_tx[len++] = ((DWIN_DATA_CTRL_ADDR + 0) >> 8) & 0xFF; /* address high byte */
dwin_buff_tx[len++] = (DWIN_DATA_CTRL_ADDR + 0) & 0xFF; /* address low byte */
dwin_buff_tx[len++] = 0x00; /* data */
dwin_buff_tx[len++] = 0x00; /* data */
} }
dwin_send(len); dwin_send(len);
} }

1
stm32f4/src/dwin.h
View File

@ -12,7 +12,6 @@
#define DWIN_PIN_RX (GPIO_Pin_3) #define DWIN_PIN_RX (GPIO_Pin_3)
#define DWIN_BAUDRATE (115200) #define DWIN_BAUDRATE (115200)
#define DWIN_DATA_DISP_ADDR (0x5000) #define DWIN_DATA_DISP_ADDR (0x5000)
#define DWIN_DATA_DISP_LENG (0x3A) #define DWIN_DATA_DISP_LENG (0x3A)
#define DWIN_DATA_CTRL_ADDR (0x5100) #define DWIN_DATA_CTRL_ADDR (0x5100)

45
stm32f4/src/rs485.c
View File

@ -13,8 +13,7 @@
uint8_t rs485_buff_tx[RS485_BUFF_TX_LEN] __attribute__((aligned(16))); uint8_t rs485_buff_tx[RS485_BUFF_TX_LEN] __attribute__((aligned(16)));
uint8_t rs485_buff_rx[RS485_BUFF_RX_LEN] __attribute__((aligned(16))); uint8_t rs485_buff_rx[RS485_BUFF_RX_LEN] __attribute__((aligned(16)));
static int __attribute__((section(".bss_ccm"))) sm = 0; static int __attribute__((section(".bss_ccm"))) sm = 0;
uint32_t rs485_baudrate __attribute__((section(".bss_ccm"))) = 19200; struct rs485_cfg_dwin rs485_cfg_dwin __attribute__((section(".bss_ccm")));
uint8_t rs485_mb_addr __attribute__((section(".bss_ccm"))) = 1;
char sn[16] __attribute__((section(".bss_ccm"))); char sn[16] __attribute__((section(".bss_ccm")));
struct lark1s_gas_info_s lark1s_gas_info __attribute__((section(".bss_ccm"))); struct lark1s_gas_info_s lark1s_gas_info __attribute__((section(".bss_ccm")));
@ -64,7 +63,7 @@ void rs485_init(void)
USART_DeInit(USART3); USART_DeInit(USART3);
USART_OverSampling8Cmd(USART3, ENABLE); USART_OverSampling8Cmd(USART3, ENABLE);
USART_InitStructure.USART_BaudRate = rs485_baudrate; USART_InitStructure.USART_BaudRate = rs485_cfg_dwin.baudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_StopBits = USART_StopBits_1;
@ -129,6 +128,11 @@ void rs485_state_machine_tx(void)
case 2: len = lark1s_req_gas3_cali_data(rs485_buff_tx); break; case 2: len = lark1s_req_gas3_cali_data(rs485_buff_tx); break;
case 3: len = lark1s_req_data(rs485_buff_tx); break; case 3: len = lark1s_req_data(rs485_buff_tx); break;
case 4: len = lark1s_req_status(rs485_buff_tx); break; case 4: len = lark1s_req_status(rs485_buff_tx); break;
case 5: len = lark1s_req_gas3_cali_zero_record(rs485_buff_tx, LARK1S_CALI_ZERO); break;
case 6: len = lark1s_req_gas3_cali_active(rs485_buff_tx, LARK1S_CALI_ZERO); break;
case 7: len = lark1s_req_gas3_cali_span_record(rs485_buff_tx, rs485_cfg_dwin.concentration); break;
case 8: len = lark1s_req_gas3_cali_active(rs485_buff_tx, LARK1S_CALI_SPAN); break;
case 9: len = lark1s_req_gas3_cali_restore(rs485_buff_tx); break;
default: len = 0; break; default: len = 0; break;
} }
rs485_send((uint16_t)len); rs485_send((uint16_t)len);
@ -144,15 +148,38 @@ void rs485_state_machine_rx(int len)
case 2: ret = lark1s_parse_gas3_cali_data(rs485_buff_rx, len, &lark1s_gas_cali_data); break; case 2: ret = lark1s_parse_gas3_cali_data(rs485_buff_rx, len, &lark1s_gas_cali_data); break;
case 3: ret = lark1s_parse_data(rs485_buff_rx, len, &lark1s_data); break; case 3: ret = lark1s_parse_data(rs485_buff_rx, len, &lark1s_data); break;
case 4: ret = lark1s_parse_status(rs485_buff_rx, len, &lark1s_status); break; case 4: ret = lark1s_parse_status(rs485_buff_rx, len, &lark1s_status); break;
case 5: ret = lark1s_parse_gas3_cali_zero_record(rs485_buff_rx, len); break;
case 6: ret = lark1s_parse_gas3_cali_active(rs485_buff_rx, len); break;
case 7: ret = lark1s_parse_gas3_cali_span_record(rs485_buff_rx, len); break;
case 8: ret = lark1s_parse_gas3_cali_active(rs485_buff_rx, len); break;
case 9: ret = lark1s_parse_gas3_cali_restore(rs485_buff_rx, len); break;
default: break; default: break;
} }
if (ret) { if ((ret != LARK1S_PARSE_OK) && (sm >= 5)) {
sm = 0;
return;
}
if ((sm == 4) ||(sm == 6) || (sm == 8) || (sm == 9)) {
sm = 0;
return; return;
} }
sm++; sm++;
if (sm > 4) { if (sm > 9) {
sm = 0; sm = 0;
} }
if (sm < 4) {
if (rs485_cfg_dwin.restore_bak) {
rs485_cfg_dwin.restore_bak = 0;
sm = 9;
} else if (rs485_cfg_dwin.cali_bak) {
rs485_cfg_dwin.cali_bak = 0;
if (rs485_cfg_dwin.concentration == 0) {
sm = 5;
} else {
sm = 7;
}
}
}
} }
void rs485_loop(void) void rs485_loop(void)
@ -165,12 +192,12 @@ void rs485_loop(void)
return; return;
} }
ms = system_tick_cnt; ms = system_tick_cnt;
if (baudrate != rs485_baudrate) { if (baudrate != rs485_cfg_dwin.baudrate) {
baudrate = rs485_baudrate; baudrate = rs485_cfg_dwin.baudrate;
rs485_init(); rs485_init();
} }
if (addr != rs485_mb_addr) { if (addr != rs485_cfg_dwin.address) {
addr = rs485_mb_addr; addr = rs485_cfg_dwin.address;
lark1s_set_mb_address(addr); lark1s_set_mb_address(addr);
} }
rs485_state_machine_tx(); rs485_state_machine_tx();

13
stm32f4/src/rs485.h
View File

@ -12,8 +12,17 @@
#define RS485_PIN_RX (GPIO_Pin_11) #define RS485_PIN_RX (GPIO_Pin_11)
#define RS485_PIN_DIR (GPIO_Pin_1) #define RS485_PIN_DIR (GPIO_Pin_1)
extern uint32_t rs485_baudrate; struct rs485_cfg_dwin {
extern uint8_t rs485_mb_addr; uint32_t baudrate;
uint32_t concentration;
uint8_t cali;
uint8_t cali_bak;
uint8_t restore;
uint8_t restore_bak;
uint8_t address;
};
extern struct rs485_cfg_dwin rs485_cfg_dwin;
void rs485_init(void); void rs485_init(void);
void rs485_send(uint16_t len); void rs485_send(uint16_t len);