rp2040/driver/inc/reg/usb_reg.h

#ifndef __HARDWARE_USB_REG_H__
#define __HARDWARE_USB_REG_H__

#include "reg.h"

// Endpoint buffer control bits
#define USB_BUF_CTRL_FULL      0x00008000u
#define USB_BUF_CTRL_LAST      0x00004000u
#define USB_BUF_CTRL_DATA0_PID 0x00000000u
#define USB_BUF_CTRL_DATA1_PID 0x00002000u
#define USB_BUF_CTRL_SEL       0x00001000u
#define USB_BUF_CTRL_STALL     0x00000800u
#define USB_BUF_CTRL_AVAIL     0x00000400u
#define USB_BUF_CTRL_LEN_MASK  0x000003FFu
#define USB_BUF_CTRL_LEN_LSB   0

// ep_inout_ctrl bits
#define EP_CTRL_ENABLE_BITS (1u << 31u)
#define EP_CTRL_DOUBLE_BUFFERED_BITS (1u << 30)
#define EP_CTRL_INTERRUPT_PER_BUFFER (1u << 29)
#define EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER (1u << 28)
#define EP_CTRL_INTERRUPT_ON_NAK (1u << 16)
#define EP_CTRL_INTERRUPT_ON_STALL (1u << 17)
#define EP_CTRL_BUFFER_TYPE_LSB 26
#define EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB 16

/* MAIN_CTRL Register @0x040 */
#define USB_MAIN_CTRL_CONTROLLER_EN_BITS 0x00000001

/* SIE_CTRL Register @0x04C */
#define USB_SIE_CTRL_PULLUP_EN_BITS    0x00010000
#define USB_SIE_CTRL_EP0_INT_1BUF_BITS 0x20000000

/* SIE_STATUS Register @0x050 */
#define USB_SIE_STATUS_SETUP_REC_BITS 0x00020000
#define USB_SIE_STATUS_BUS_RESET_BITS 0x00080000

/* USB_MUXING Register @0x074 */
#define USB_USB_MUXING_TO_PHY_BITS  0x00000001
#define USB_USB_MUXING_SOFTCON_BITS 0x00000008

/* USB_PWR Register @0x078 */
#define USB_USB_PWR_VBUS_DETECT_BITS             0x00000004
#define USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS 0x00000008

/* INTR Register @0x08C, INTE Register @0x090, INTF Register @0x094, INTS Register @0x098 */
#define USB_INTS_BUFF_STATUS_BITS 0x00000010
#define USB_INTS_BUS_RESET_BITS   0x00001000
#define USB_INTS_SETUP_REQ_BITS   0x00010000

#define USB_NUM_ENDPOINTS            (16)
#define USB_DPRAM_MAX                (4096)

#define USB_HOST_INTERRUPT_ENDPOINTS (USB_NUM_ENDPOINTS - 1)

typedef struct {
    // 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accesses
    volatile uint8_t setup_packet[8]; // First 8 bytes are always for setup packets

    // Starts at ep1
    struct usb_device_dpram_ep_ctrl {
        io_rw_32 in;
        io_rw_32 out;
    } ep_ctrl[USB_NUM_ENDPOINTS - 1];

    // Starts at ep0
    struct usb_device_dpram_ep_buf_ctrl {
        io_rw_32 in;
        io_rw_32 out;
    } ep_buf_ctrl[USB_NUM_ENDPOINTS];

    // EP0 buffers are fixed. Assumes single buffered mode for EP0
    uint8_t ep0_buf_a[0x40];
    uint8_t ep0_buf_b[0x40];

    // Rest of DPRAM can be carved up as needed
    uint8_t epx_data[USB_DPRAM_MAX - 0x180];
} usb_device_dpram_t;

typedef struct {
    // 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accesses
    volatile uint8_t setup_packet[8]; // First 8 bytes are always for setup packets

    // Interrupt endpoint control 1 -> 15
    struct usb_host_dpram_ep_ctrl {
        io_rw_32 ctrl;
        io_rw_32 spare;
    } int_ep_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];

    io_rw_32 epx_buf_ctrl;
    io_rw_32 _spare0;

    // Interrupt endpoint buffer control
    struct usb_host_dpram_ep_buf_ctrl {
        io_rw_32 ctrl;
        io_rw_32 spare;
    } int_ep_buffer_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];

    io_rw_32 epx_ctrl;

    uint8_t _spare1[124];

    // Should start at 0x180
    uint8_t epx_data[USB_DPRAM_MAX - 0x180];
} usb_host_dpram_t;

typedef struct {
    io_rw_32 dev_addr_ctrl;
    io_rw_32 int_ep_addr_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];
    io_rw_32 main_ctrl;
    io_rw_32 sof_rw;
    io_ro_32 sof_rd;
    io_rw_32 sie_ctrl;
    io_rw_32 sie_status;
    io_rw_32 int_ep_ctrl;
    io_rw_32 buf_status;
    io_rw_32 buf_cpu_should_handle; // for double buff
    io_rw_32 abort;
    io_rw_32 abort_done;
    io_rw_32 ep_stall_arm;
    io_rw_32 nak_poll;
    io_rw_32 ep_nak_stall_status;
    io_rw_32 muxing;
    io_rw_32 pwr;
    io_rw_32 phy_direct;
    io_rw_32 phy_direct_override;
    io_rw_32 phy_trim;
    io_rw_32 linestate_tuning;
    io_rw_32 intr;
    io_rw_32 inte;
    io_rw_32 intf;
    io_rw_32 ints;
} usb_hw_t;

#define usb_hw       ((usb_hw_t *const)USBCTRL_REGS_BASE)
#define usb_hw_set   ((usb_hw_t *const)hw_set_alias_untyped(usb_hw))
#define usb_hw_clear ((usb_hw_t *const)hw_clear_alias_untyped(usb_hw))

#define usb_dpram ((usb_device_dpram_t *)USBCTRL_DPRAM_BASE)
#define usbh_dpram ((usb_host_dpram_t *)USBCTRL_DPRAM_BASE)

#ifdef __cplusplus
extern "C" {
#endif

#ifdef __cplusplus
}
#endif

#endif /* __HARDWARE_USB_REG_H__ */