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[fix] re order uart init

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This commit is contained in:
zhji 2025-03-19 22:15:07 +08:00
parent 0fcc8ac246
commit 2b780b6cf7
3 changed files with 51 additions and 38 deletions
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1
driver/inc/uart.h
View File

@ -56,6 +56,7 @@
#define UART_FLAG_RI (1 << 8U)
struct uart_cfg_s {
uint32_t baudrate;
uint8_t mode;
uint8_t data_bits;
uint8_t parity;

69
driver/src/uart.c
View File

@ -4,32 +4,7 @@ void uart_init(uint8_t uart_id, struct uart_cfg_s *cfg)
{
uint32_t addr, val;
addr = UART0_BASE + UART_UARTCR_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
val &= ~UART_UARTCR_UARTEN;
val &= ~UART_UARTCR_SIREN;
val &= ~UART_UARTCR_SIRLP;
val &= ~UART_UARTCR_LBE;
val &= ~UART_UARTCR_DTR;
val &= ~UART_UARTCR_RTS;
val &= ~UART_UARTCR_OUT1;
val &= ~UART_UARTCR_OUT2;
val &= ~UART_UARTCR_RTSEN;
val &= ~UART_UARTCR_CTSEN;
if (cfg->mode == UART_MODE_NONE) {
val &= ~UART_UARTCR_TXE;
val &= ~UART_UARTCR_RXE;
} else if (cfg->mode == UART_MODE_TX_ONLY) {
val |= UART_UARTCR_TXE;
val &= ~UART_UARTCR_RXE;
} else if (cfg->mode == UART_MODE_RX_ONLY) {
val &= ~UART_UARTCR_TXE;
val |= UART_UARTCR_RXE;
} else {
val |= UART_UARTCR_TXE;
val |= UART_UARTCR_RXE;
}
putreg32(val, addr);
uart_set_baudrate(uart_id, 200 * 1000 * 1000, cfg->baudrate);
addr = UART0_BASE + UART_UARTLCR_H_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
@ -60,15 +35,46 @@ void uart_init(uint8_t uart_id, struct uart_cfg_s *cfg)
} else {
val &= ~UART_UARTLCR_H_STP2;
}
val &= ~UART_UARTLCR_H_WLEN_MASK;
val |= (cfg->data_bits << UART_UARTLCR_H_WLEN_POS);
putreg32(val, addr);
addr = UART0_BASE + UART_UARTCR_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
val |= UART_UARTCR_UARTEN;
val &= ~UART_UARTCR_SIREN;
val &= ~UART_UARTCR_SIRLP;
val &= ~UART_UARTCR_LBE;
val &= ~UART_UARTCR_DTR;
val &= ~UART_UARTCR_RTS;
val &= ~UART_UARTCR_OUT1;
val &= ~UART_UARTCR_OUT2;
val &= ~UART_UARTCR_RTSEN;
val &= ~UART_UARTCR_CTSEN;
if (cfg->mode == UART_MODE_NONE) {
val &= ~UART_UARTCR_TXE;
val &= ~UART_UARTCR_RXE;
} else if (cfg->mode == UART_MODE_TX_ONLY) {
val |= UART_UARTCR_TXE;
val &= ~UART_UARTCR_RXE;
} else if (cfg->mode == UART_MODE_RX_ONLY) {
val &= ~UART_UARTCR_TXE;
val |= UART_UARTCR_RXE;
} else {
val |= UART_UARTCR_TXE;
val |= UART_UARTCR_RXE;
}
putreg32(val, addr);
addr = UART0_BASE + UART_UARTLCR_H_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
if (cfg->fifo_enable) {
val |= UART_UARTLCR_H_FEN;
} else {
val &= ~UART_UARTLCR_H_FEN;
}
val &= ~UART_UARTLCR_H_WLEN_MASK;
val |= (cfg->data_bits << UART_UARTLCR_H_WLEN_POS);
putreg32(val, addr);
addr = UART0_BASE + UART_UARTIFLS_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
val &= ~UART_UARTIFLS_TXIFLSEL_MASK;
@ -76,11 +82,6 @@ void uart_init(uint8_t uart_id, struct uart_cfg_s *cfg)
val &= ~UART_UARTIFLS_RXIFLSEL_MASK;
val |= (cfg->rx_fifo_level << UART_UARTIFLS_RXIFLSEL_POS);
putreg32(val, addr);
addr = UART0_BASE + UART_UARTCR_OFFSET + (UART1_BASE - UART0_BASE) * uart_id;
val = getreg32(addr);
val |= UART_UARTCR_UARTEN;
putreg32(val, addr);
}
void uart_set_baudrate(uint8_t uart_id, uint32_t src_clk, uint32_t baudrate)

19
main.c
View File

@ -129,6 +129,7 @@ struct dma_sniff_cfg_s sniff_cfg = {
};
struct uart_cfg_s uart_cfg = {
.baudrate = 6 * 1000 * 1000,
.mode = UART_MODE_TX_RX,
.data_bits = UART_DATABITS_8,
.parity = UART_PARITY_NONE,
@ -138,10 +139,16 @@ struct uart_cfg_s uart_cfg = {
.rx_fifo_level = UART_FIFO_LEVEL_1_2,
};
void isr_uart0(void)
{
uint32_t status = uart_int_get_mask_status(UART_ID_0);
printf("sts = 0x%08lX\t\n", status);
}
int main(void)
{
reset_disable(RESET_IO_BANK0 | RESET_PADS_BANK0);
reset_disable(RESET_PIO0);
reset_enable(RESET_IO_BANK0 | RESET_PADS_BANK0 | RESET_PIO0 | RESET_DMA | RESET_UART0);
reset_disable(RESET_IO_BANK0 | RESET_PADS_BANK0 | RESET_PIO0 | RESET_DMA | RESET_UART0);
gpio_init(&gpio_led_cfg);
gpio_init_simple(rmii.pin, GPIO_FUNC_PIO0, DISABLE, DISABLE);
gpio_init_simple(rmii.pin + 1, GPIO_FUNC_PIO0, DISABLE, DISABLE);
@ -171,9 +178,13 @@ int main(void)
__enable_irq();
pio_rmii_tx_init(&rmii);
reset_disable(RESET_UART0);
// reset_enable(RESET_UART0);
// reset_disable(RESET_UART0);
while (!reset_get_state(RESET_UART0));
uart_init(UART_ID_0, &uart_cfg);
uart_set_baudrate(UART_ID_0, 200 * 1000 * 1000, 6 * 1000 * 1000);
// uart_set_baudrate(UART_ID_0, 200 * 1000 * 1000, 2 * 1000 * 1000);
uart_int_enable(UART_ID_0, UART_INT_ALL);
// NVIC_EnableIRQ(UART0_IRQ_IRQn);
while (1) {
static uint32_t tick_led = 0;