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[update] update boot2 uart function

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zhji 2025-05-04 17:53:04 +08:00
parent c19db2d504
commit 5470f0d5c3
1 changed files with 84 additions and 1 deletions
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85
example/boot2/main.c
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@ -76,6 +76,81 @@ struct uart_cfg_s uart_cfg = {
.rx_fifo_level = UART_FIFO_LEVEL_1_2, .rx_fifo_level = UART_FIFO_LEVEL_1_2,
}; };
void uart_process(uint16_t code, uint16_t length)
{
uint8_t *p;
uint32_t checksum_read, checksum_calc;
uint16_t i;
uint32_t v1, v2;
p = uart_rx_buffer + 8;
if ((length > 0) && (length <= 4)) {
return;
}
if (length > 4) {
checksum_read = ((uint32_t)p[0] << 24) | ((uint32_t)p[1] << 16) | ((uint32_t)p[2] << 8) | ((uint32_t)p[3] << 0);
p += 4;
length -= 4;
checksum_calc = 0;
for (i = 0; i < length; i++) {
checksum_calc += p[i];
}
if (checksum_read != checksum_calc) {
return;
}
}
if (code == 0x0001) {
v1 = ((uint32_t)p[0] << 24) | ((uint32_t)p[1] << 16) | ((uint32_t)p[2] << 8) | ((uint32_t)p[3] << 0);
v2 = ((uint32_t)p[4] << 24) | ((uint32_t)p[5] << 16) | ((uint32_t)p[6] << 8) | ((uint32_t)p[7] << 0);
printf("erase, addr=0x%08lX, length = %ld\r\n", v1, v2);
} else if (code == 0x0002) {
v1 = ((uint32_t)p[0] << 24) | ((uint32_t)p[1] << 16) | ((uint32_t)p[2] << 8) | ((uint32_t)p[3] << 0);
v2 = ((uint32_t)p[4] << 24) | ((uint32_t)p[5] << 16) | ((uint32_t)p[6] << 8) | ((uint32_t)p[7] << 0);
printf("write, addr=0x%08lX, length = %ld\r\n", v1, v2);
} else if (code == 0x0003) {
v1 = ((uint32_t)p[0] << 24) | ((uint32_t)p[1] << 16) | ((uint32_t)p[2] << 8) | ((uint32_t)p[3] << 0);
v2 = ((uint32_t)p[4] << 24) | ((uint32_t)p[5] << 16) | ((uint32_t)p[6] << 8) | ((uint32_t)p[7] << 0);
printf("read, addr=0x%08lX, length = %ld\r\n", v1, v2);
}
}
void uart_state_machine(uint8_t id)
{
static uint64_t time_fifo_empty = 0;
static uint16_t uart_rx_length = 0;
uint16_t code, code_inv, length, length_inv;
if (uart_get_flags(id) & UART_FLAG_RXFE) {
if (timer_count_read() - time_fifo_empty < 1000) {
return;
}
time_fifo_empty = timer_count_read();
if (uart_rx_length < 8) {
uart_rx_length = 0;
return;
}
code = ((uint16_t)uart_rx_buffer[0] << 8) | (uint16_t)uart_rx_buffer[1];
code_inv = ((uint16_t)uart_rx_buffer[2] << 8) | (uint16_t)uart_rx_buffer[3];
length = ((uint16_t)uart_rx_buffer[4] << 8) | (uint16_t)uart_rx_buffer[5];
length_inv = ((uint16_t)uart_rx_buffer[6] << 8) | (uint16_t)uart_rx_buffer[7];
if ((code != (uint16_t)~code_inv) || (length != (uint16_t)~length_inv)) {
uart_rx_length = 0;
return;
}
uart_process(code, length);
uart_rx_length = 0;
} else {
uart_rx_buffer[uart_rx_length++] = uart0_hw->dr & 0xFF;
time_fifo_empty = timer_count_read();
if (uart_rx_length >= sizeof(flash_rx_buffer)) {
uart_rx_length = 0;
return;
}
printf("%02X,", uart_rx_buffer[uart_rx_length-1]);
}
}
int main(void) int main(void)
{ {
clock_ref_set_src(CLOCK_REF_SRC_XOSC_GLITCHLESS); clock_ref_set_src(CLOCK_REF_SRC_XOSC_GLITCHLESS);
@ -87,13 +162,21 @@ int main(void)
clock_peri_set(ENABLE, CLOCK_PERI_SRC_SYSPLL); clock_peri_set(ENABLE, CLOCK_PERI_SRC_SYSPLL);
reset_unreset_blocks_wait(RESETS_BLOCK_IO_BANK0 | RESETS_BLOCK_PADS_BANK0 | RESETS_BLOCK_UART0 | RESETS_BLOCK_TIMER); reset_unreset_blocks_wait(RESETS_BLOCK_IO_BANK0 | RESETS_BLOCK_PADS_BANK0 | RESETS_BLOCK_UART0 | RESETS_BLOCK_TIMER);
uart_init(UART_ID_0, &uart_cfg);
gpio_init_simple(0, GPIO_FUNC_UART, DISABLE, ENABLE); gpio_init_simple(0, GPIO_FUNC_UART, DISABLE, ENABLE);
gpio_init_simple(1, GPIO_FUNC_UART, DISABLE, ENABLE);
uart_init(UART_ID_0, &uart_cfg);
timer_start(); timer_start();
printf("boot2 system clock = 60MHz\r\n"); printf("boot2 system clock = 60MHz\r\n");
printf("boot2 peripheral clock = 120MHz\r\n"); printf("boot2 peripheral clock = 120MHz\r\n");
while (1) {
// int c = uart_get_char(UART_ID_0);
// if (c >= 0) {
// uart_put_char(UART_ID_0, c);
// }
uart_state_machine(UART_ID_0);
}
// flash_erase(addr); // flash_erase(addr);
flash_read(0x1200, flash_rx_buffer, FLASH_WRITE_SIZE); flash_read(0x1200, flash_rx_buffer, FLASH_WRITE_SIZE);
// flash_write(addr, data, FLASH_WRITE_SIZE); // flash_write(addr, data, FLASH_WRITE_SIZE);