From d5069efd375464547616dbcec7e7c1538201d815 Mon Sep 17 00:00:00 2001 From: zhji Date: Sat, 15 Mar 2025 15:58:45 +0800 Subject: [PATCH] [update] change system clock to 200MHz --- CMSIS/Device/RaspberryPi/RP2040/Source/system_RP2040.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/CMSIS/Device/RaspberryPi/RP2040/Source/system_RP2040.c b/CMSIS/Device/RaspberryPi/RP2040/Source/system_RP2040.c index c130714..4b9b073 100644 --- a/CMSIS/Device/RaspberryPi/RP2040/Source/system_RP2040.c +++ b/CMSIS/Device/RaspberryPi/RP2040/Source/system_RP2040.c @@ -34,7 +34,7 @@ /*--------------------------------------------------------------------------- System Core Clock Variable *---------------------------------------------------------------------------*/ -#define MacroSystemCoreClock (400 * 1000 * 1000) +#define MacroSystemCoreClock (200 * 1000 * 1000) uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock)*/ volatile uint32_t tick_1ms; @@ -54,8 +54,9 @@ void __attribute__((constructor)) SystemInit (void) system_regulator_set(SYSTEM_REGULATOR_VOLTAGE_1P30V); clock_ref_set_src(CLOCK_REF_SRC_XOSC_GLITCHLESS); clock_sys_set_src(CLOCK_SYS_SRC_REF_GLITCHLESS); - clock_pll_init(CLOCK_PLL_SYSPLL, 1, 100, 3, 1); /* 12MHz * 100 / 3 / 1 = 400MHz */ - clock_sys_set_div(1 << 8); /* 400MHz / 1 = 400MHz */ + /* refdiv >= 5MHz, VCO=[750:1600]MHz, fbdiv=[16:320], postdiv=[1:7] */ + clock_pll_init(CLOCK_PLL_SYSPLL, 1, 100, 3, 2); /* 12MHz / 1 * 100 / 3 / 2 = 200MHz */ + clock_sys_set_div(1 << 8); /* 200MHz / 1 = 200MHz */ clock_sys_set_src(CLOCK_SYS_SRC_SYSPLL); SystemCoreClockUpdate();