82 lines
2.4 KiB
C
82 lines
2.4 KiB
C
#ifndef __HARDWARE_GPIO_REG_H__
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#define __HARDWARE_GPIO_REG_H__
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/* IO_BANK0_BASE @0x40014000 */
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#define GPIO_STATUS_OFFSET (0x000)
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#define GPIO_CTRL_OFFSET (0x004)
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#define GPIO_INTR_OFFSET (0x0F0) /* raw interrupts */
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#define GPIO_INTE_PROC0_OFFSET (0x100) /* interrupt enable for proc0 */
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#define GPIO_INTF_PROC0_OFFSET (0x110) /* interrupt force for proc0 */
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#define GPIO_INTS_PROC0_OFFSET (0x120) /* interrupt status after masking & forcing for proc0 */
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#define GPIO_INTE_PROC1_OFFSET (0x130) /* interrupt enable for proc1 */
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#define GPIO_INTF_PROC1_OFFSET (0x140) /* interrupt force for proc1 */
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#define GPIO_INTS_PROC1_OFFSET (0x150) /* interrupt status after masking & forcing for proc1 */
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#define GPIO_INTE_DORMANT_WAKE_OFFSET (0x160) /* interrupt enable for dormant_wake */
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#define GPIO_INTF_DORMANT_WAKE_OFFSET (0x170) /* interrupt force for dormant_wake */
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#define GPIO_INTS_DORMANT_WAKE_OFFSET (0x180) /* interrupt status after masking & forcing for dormant_wake */
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/* GPIO_STATUS_OFFSET */
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#define GPIO_STATUS_OE_FROM_PERI (1 << 12)
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#define GPIO_STATUS_OE_TO_PAD (1 << 13)
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#define GPIO_STATUS_IN_FROM_PAD (1 << 17)
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#define GPIO_STATUS_IN_TO_PERI (1 << 19)
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#define GPIO_STATUS_IRQ_FROM_PAD (1 << 24)
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#define GPIO_STATUS_IRQ_TO_PROC (1 << 26)
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typedef struct {
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io_rw_32 voltage_select;
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io_rw_32 io[30];
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} pads_bank0_hw_t;
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#define pads_bank0_hw ((pads_bank0_hw_t *)PADS_BANK0_BASE)
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typedef struct {
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io_rw_32 voltage_select;
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io_rw_32 io_qspi_sclk;
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io_rw_32 io_qspi_sd0;
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io_rw_32 io_qspi_sd1;
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io_rw_32 io_qspi_sd2;
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io_rw_32 io_qspi_sd3;
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io_rw_32 io_qspi_ss;
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} pads_qspi_hw_t;
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#define pads_qspi_hw ((pads_qspi_hw_t *const)PADS_QSPI_BASE)
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typedef struct {
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io_rw_32 inte[4];
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io_rw_32 intf[4];
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io_rw_32 ints[4];
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} io_irq_ctrl_hw_t;
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typedef struct {
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struct {
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io_rw_32 status;
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io_rw_32 ctrl;
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} io[30];
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io_rw_32 intr[4];
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io_irq_ctrl_hw_t proc0_irq_ctrl;
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io_irq_ctrl_hw_t proc1_irq_ctrl;
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io_irq_ctrl_hw_t dormant_wake_irq_ctrl;
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} iobank0_hw_t;
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#define iobank0_hw ((iobank0_hw_t *const)IO_BANK0_BASE)
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typedef struct {
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struct {
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io_rw_32 status;
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io_rw_32 ctrl;
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} io[6];
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} ioqspi_hw_t;
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#define ioqspi_hw ((ioqspi_hw_t *const)IO_QSPI_BASE)
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HARDWARE_GPIO_REG_H__ */
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