61 lines
1.2 KiB
Plaintext
61 lines
1.2 KiB
Plaintext
ENTRY(isr_reset)
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MEMORY
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{
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TCM (rx) :ORIGIN = 0x20020000, LENGTH = 128K
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RAM (xrw) :ORIGIN = 0x20000000, LENGTH = 128K
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STACK (rw) :ORIGIN = 0x20040000, LENGTH = 4K
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STACK_CORE1 (rw) :ORIGIN = 0x20041000, LENGTH = 4K
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}
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_stack_top = ORIGIN(STACK) + LENGTH(STACK);
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_stack_top_core1 = ORIGIN(STACK_CORE1) + LENGTH(STACK_CORE1);
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SECTIONS
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{
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.isr_vector :
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{
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. = ALIGN(4);
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_vector_load = LOADADDR(.isr_vector);
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KEEP(*(.isr_vector))
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. = ALIGN(4);
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} >TCM
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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. = ALIGN(4);
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} >TCM
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata)
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*(.rodata*)
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. = ALIGN(4);
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} >TCM
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.data :
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{
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. = ALIGN(4);
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_data_load = LOADADDR(.data);
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_data_run = .;
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*(.data)
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*(.data.*)
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. = ALIGN(4);
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_data_run_end = .;
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} >RAM AT>TCM
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_bss_run = .;
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*(.bss)
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*(.bss.*)
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. = ALIGN(4);
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_bss_run_end = .;
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} >RAM
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}
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