32 lines
805 B
C
32 lines
805 B
C
#ifndef __HARDWARE_M0PLUS_REG_H__
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#define __HARDWARE_M0PLUS_REG_H__
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#include "reg.h"
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/* Nested Vectored Interrupt Controller(NVIC) */
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#define M0PLUS_NVIC_ISER_OFFSET 0x0000E100
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#define M0PLUS_NVIC_ICER_OFFSET 0x0000E180
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#define M0PLUS_NVIC_ISPR_OFFSET 0x0000E200
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#define M0PLUS_NVIC_ICPR_OFFSET 0x0000E280
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#define M0PLUS_NVIC_IPR0_OFFSET 0x0000E400
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/* System Control Block(SCB) */
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#define M0PLUS_CPUID_OFFSET 0x0000ED00
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#define M0PLUS_ICSR_OFFSET 0x0000ED04
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#define M0PLUS_VTOR_OFFSET 0x0000ED08
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#define M0PLUS_AIRCR_OFFSET 0x0000ED0C
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#define M0PLUS_SCR_OFFSET 0x0000ED10
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#define M0PLUS_CCR_OFFSET 0x0000ED14
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#define M0PLUS_SHPR2_OFFSET 0x0000ED1C
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#define M0PLUS_SHPR3_OFFSET 0x0000ED20
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HARDWARE_M0PLUS_REG_H__ */
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