diff --git a/bootloader/main.c b/bootloader/main.c index aaf7ab3..6dcc993 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -3,6 +3,7 @@ #include "uart_log.h" #include "ltimer.h" #include "qspi_flash.h" +#include "uart_download.h" #include "stdio.h" void system_init(void) @@ -75,6 +76,7 @@ void system_init(void) uart_log_init(); ltimer_init(); qspi_flash_init(3); /* 200MHz / (3 + 1) = 50MHz */ + uart_download_init(); } void led_blink(void) @@ -86,47 +88,48 @@ void led_blink(void) uint8_t data[256]; int main(void) { - uint32_t ret; + // uint32_t ret; system_init(); printf("Run start ...\r\n"); printf("SystemCoreClock = %ld\r\n", SystemCoreClock); printf("SystemD2Clock = %ld\r\n", SystemD2Clock); - ret = qspi_flash_erase_4kbytes(0); - if (ret) { - printf("qspi_flash_erase_4k error: 0x%08lX\r\n", ret); - } else { - printf("qspi_flash_erase_4k ok\r\n"); - } + // ret = qspi_flash_erase_4kbytes(0); + // if (ret) { + // printf("qspi_flash_erase_4k error: 0x%08lX\r\n", ret); + // } else { + // printf("qspi_flash_erase_4k ok\r\n"); + // } - for (uint32_t i = 0; i < sizeof(data); i++) { - data[i] = (uint8_t)(i & 0xFF); - } - ret = qspi_flash_write(0, data, sizeof(data)); - if (ret) { - printf("qspi_flash_write error: 0x%08lX\r\n", ret); - } else { - printf("qspi_flash_write ok\r\n"); - } + // for (uint32_t i = 0; i < sizeof(data); i++) { + // data[i] = (uint8_t)(i & 0xFF); + // } + // ret = qspi_flash_write(0, data, sizeof(data)); + // if (ret) { + // printf("qspi_flash_write error: 0x%08lX\r\n", ret); + // } else { + // printf("qspi_flash_write ok\r\n"); + // } while (1) { uint64_t ms; ms = ltimer_get_ms(); printf("Hello World, ms = %llu, tick = %ld\r\n", ms, HAL_GetTick()); - ret = qspi_flash_read(0, data, 30); - if (ret) { - printf("qspi_flash_read error: 0x%08lX\r\n", ret); - } else { - printf("qspi_flash_read ok\r\n"); - for (uint32_t i = 0; i < sizeof(data); i++) { - if (i % 16 == 0) { - printf("\r\n"); - } - printf("%02X ", data[i]); - } - } + // ret = qspi_flash_read(0, data, 30); + // if (ret) { + // printf("qspi_flash_read error: 0x%08lX\r\n", ret); + // } else { + // printf("qspi_flash_read ok\r\n"); + // for (uint32_t i = 0; i < sizeof(data); i++) { + // if (i % 16 == 0) { + // printf("\r\n"); + // } + // printf("%02X ", data[i]); + // } + // } + uart_download_send(); led_blink(); ltimer_delay_ms(1000); } diff --git a/bootloader/src/CMakeLists.txt b/bootloader/src/CMakeLists.txt index d4c628e..ccfa3c4 100644 --- a/bootloader/src/CMakeLists.txt +++ b/bootloader/src/CMakeLists.txt @@ -1,5 +1,6 @@ file(GLOB FILELIST led.c +uart_download.c ) add_library(src STATIC ${FILELIST}) diff --git a/bootloader/src/uart_download.c b/bootloader/src/uart_download.c new file mode 100644 index 0000000..58a9a13 --- /dev/null +++ b/bootloader/src/uart_download.c @@ -0,0 +1,80 @@ +#include "uart_download.h" +#include "stdio.h" + +static UART_HandleTypeDef uart_download; + +static void UART_DOWNLOAD_Msp_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit; + + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + USART_DOWNLOAD_TX_GPIO_CLK_ENABLE(); + USART_DOWNLOAD_RX_GPIO_CLK_ENABLE(); + + /* Select HSI as source of USARTx clocks */ + RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART_DOWNLOAD; + RCC_PeriphClkInit.Usart16ClockSelection = RCC_USART_DOWNLOAD_CLKSOURCE_HSI; + HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit); + + /* Enable USARTx clock */ + USART_DOWNLOAD_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = USART_DOWNLOAD_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = USART_DOWNLOAD_TX_AF; + + HAL_GPIO_Init(USART_DOWNLOAD_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = USART_DOWNLOAD_RX_PIN; + GPIO_InitStruct.Alternate = USART_DOWNLOAD_RX_AF; + + HAL_GPIO_Init(USART_DOWNLOAD_RX_GPIO_PORT, &GPIO_InitStruct); + + /* NVIC for USART */ + HAL_NVIC_SetPriority(USART_DOWNLOAD_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART_DOWNLOAD_IRQn); +} + +void uart_download_init(void) +{ + uart_download.Instance = USART_DOWNLOAD; + uart_download.Init.BaudRate = UART_DOWNLOAD_BAUDRATE; + uart_download.Init.WordLength = UART_WORDLENGTH_8B; + uart_download.Init.StopBits = UART_STOPBITS_1; + uart_download.Init.Parity = UART_PARITY_NONE; + uart_download.Init.HwFlowCtl = UART_HWCONTROL_NONE; + uart_download.Init.Mode = UART_MODE_TX_RX; + uart_download.Init.ClockPrescaler = UART_PRESCALER_DIV1; + uart_download.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + uart_download.Init.OverSampling = UART_OVERSAMPLING_16; + + UART_DOWNLOAD_Msp_Init(); + + if(HAL_UART_Init(&uart_download) != HAL_OK) { + printf("%s, %s, %d: HAL_UART_Init failed.\r\n", __FILE__, __FUNCTION__, __LINE__); + return; + } + /* Set the RXFIFO threshold */ + HAL_UARTEx_SetRxFifoThreshold(&uart_download, UART_RXFIFO_THRESHOLD_1_2); + + /* Enable the FIFO mode */ + HAL_UARTEx_EnableFifoMode(&uart_download); +} + +void uart_download_send(void) +{ + if (__HAL_UART_GET_FLAG(&uart_download, UART_FLAG_TXFNF)) { + uart_download.Instance->TDR = 'A'; + } + while (__HAL_UART_GET_FLAG(&uart_download, UART_FLAG_RXFNE)) { + printf("Recv: %02lX\r\n", uart_download.Instance->RDR); + } +} diff --git a/bootloader/src/uart_download.h b/bootloader/src/uart_download.h new file mode 100644 index 0000000..cdedbb4 --- /dev/null +++ b/bootloader/src/uart_download.h @@ -0,0 +1,45 @@ +#ifndef __UART_DOWNLOAD_H__ +#define __UART_DOWNLOAD_H__ + +#include "stm32h7xx_hal.h" + +#define UART_DOWNLOAD_BAUDRATE (500 * 1000) + +#define HAL_TIMEOUT_VALUE 0xFFFFFFFF + +#define USART_DOWNLOAD UART5 +#define USART_DOWNLOAD_CLK_ENABLE() __HAL_RCC_UART5_CLK_ENABLE() +#define USART_DOWNLOAD_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define USART_DOWNLOAD_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() + +#define __HAL_RCC_UART_DOWNLOAD_CONFIG __HAL_RCC_UART5_CONFIG +#define RCC_UART_DOWNLOAD_CLKSOURCE_HSI RCC_USART234578CLKSOURCE_HSI + +#define RCC_PERIPHCLK_USART_DOWNLOAD RCC_PERIPHCLK_UART5 +#define RCC_USART_DOWNLOAD_CLKSOURCE_HSI RCC_USART234578CLKSOURCE_HSI + +#define USART_DOWNLOAD_FORCE_RESET() __HAL_RCC_UART5_FORCE_RESET() +#define USART_DOWNLOAD_RELEASE_RESET() __HAL_RCC_UART5_RELEASE_RESET() + +#define USART_DOWNLOAD_IRQn UART5_IRQn +#define USART_DOWNLOAD_IRQHandler UART5_IRQHandler + +#define USART_DOWNLOAD_TX_PIN GPIO_PIN_13 +#define USART_DOWNLOAD_TX_GPIO_PORT GPIOB +#define USART_DOWNLOAD_TX_AF GPIO_AF14_UART5 +#define USART_DOWNLOAD_RX_PIN GPIO_PIN_12 +#define USART_DOWNLOAD_RX_GPIO_PORT GPIOB +#define USART_DOWNLOAD_RX_AF GPIO_AF14_UART5 + +#ifdef __cplusplus + extern "C" { +#endif + +void uart_download_init(void); +void uart_download_send(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __UART_DOWNLOAD_H__ */