388 lines
15 KiB
C
388 lines
15 KiB
C
#include "qspi_flash.h"
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#include "stdio.h"
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QSPI_HandleTypeDef QSPIHandle;
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/**
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* @brief This function polling for release busy status.
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* @param hqspi: QSPI handle
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* @retval error code
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*/
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static uint32_t QSPI_WaitforBusyRelease(QSPI_HandleTypeDef *hqspi)
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{
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QSPI_CommandTypeDef s_command;
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QSPI_AutoPollingTypeDef s_config;
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/* Configure automatic polling mode to wait for write enabling */
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s_config.Match = 0x0;
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s_config.Mask = (1 << 0); // BUSY
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s_config.MatchMode = QSPI_MATCH_MODE_AND;
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s_config.StatusBytesSize = 1;
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s_config.Interval = 0x10;
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s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = READ_STATUS_REG_CMD;
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s_command.AddressMode = QSPI_ADDRESS_NONE;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_1_LINE;
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s_command.DummyCycles = 0;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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if (HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"qspi auto polling for release busy\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((2 << 28) | s_config.Mask);
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}
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return 0;
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}
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/**
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* @brief This function send a Write Enable and wait it is effective.
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* @param hqspi: QSPI handle
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* @retval None
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*/
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static uint32_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi)
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{
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QSPI_CommandTypeDef s_command;
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QSPI_AutoPollingTypeDef s_config;
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/* Enable write operations */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = WRITE_ENABLE_CMD;
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s_command.AddressMode = QSPI_ADDRESS_NONE;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_NONE;
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s_command.DummyCycles = 0;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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if (HAL_QSPI_Command(hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"write enable\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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/* Configure automatic polling mode to wait for write enabling */
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s_config.Match = 0x2;
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s_config.Mask = (1 << 1) | (1 << 0); // WEL | BUSY
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s_config.MatchMode = QSPI_MATCH_MODE_AND;
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s_config.StatusBytesSize = 1;
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s_config.Interval = 0x10;
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s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
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s_command.Instruction = READ_STATUS_REG_CMD;
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s_command.DataMode = QSPI_DATA_1_LINE;
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if (HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"qspi auto polling for write enable\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((2 << 28) | s_config.Mask);
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}
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return 0;
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}
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void qspi_flash_init(uint32_t div)
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{
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GPIO_InitTypeDef gpio_init_structure;
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/*##-1- Enable peripherals and GPIO Clocks #################################*/
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/* Enable the QuadSPI memory interface clock */
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QSPI_CLK_ENABLE();
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/* Reset the QuadSPI memory interface */
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QSPI_FORCE_RESET();
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QSPI_RELEASE_RESET();
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/* Enable GPIO clocks */
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QSPI_CLK_GPIO_CLK_ENABLE();
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QSPI_BK1_CS_GPIO_CLK_ENABLE();
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QSPI_BK1_D0_GPIO_CLK_ENABLE();
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QSPI_BK1_D1_GPIO_CLK_ENABLE();
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QSPI_BK1_D2_GPIO_CLK_ENABLE();
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QSPI_BK1_D3_GPIO_CLK_ENABLE();
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/* Enable DMA clock */
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QSPI_MDMA_CLK_ENABLE();
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/*##-2- Configure peripheral GPIO ##########################################*/
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/* QSPI CLK GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_CLK_PIN;
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gpio_init_structure.Mode = GPIO_MODE_AF_PP;
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gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_CLK_GPIO_PORT, &gpio_init_structure);
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/* QSPI CS GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_BK1_CS_PIN;
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gpio_init_structure.Pull = GPIO_PULLUP;
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gpio_init_structure.Alternate = GPIO_AF10_QUADSPI;
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HAL_GPIO_Init(QSPI_BK1_CS_GPIO_PORT, &gpio_init_structure);
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/* QSPI D0 GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_BK1_D0_PIN;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_BK1_D0_GPIO_PORT, &gpio_init_structure);
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/* QSPI D1 GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_BK1_D1_PIN;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_BK1_D1_GPIO_PORT, &gpio_init_structure);
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/* QSPI D2 GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_BK1_D2_PIN;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_BK1_D2_GPIO_PORT, &gpio_init_structure);
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/* QSPI D3 GPIO pin configuration */
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gpio_init_structure.Pin = QSPI_BK1_D3_PIN;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_BK1_D3_GPIO_PORT, &gpio_init_structure);
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/*##-3- Configure the NVIC for QSPI #########################################*/
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/* NVIC configuration for QSPI interrupt */
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// HAL_NVIC_SetPriority(QUADSPI_IRQn, 0x0F, 0);
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// HAL_NVIC_EnableIRQ(QUADSPI_IRQn);
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/* Initialize QuadSPI structures ------------------------------------------- */
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QSPIHandle.Instance = QUADSPI;
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/* QSPI initialization */
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/* ClockPrescaler set to 1, so QSPI clock = 200MHz / (1+1) = 100MHz */
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QSPIHandle.Init.ClockPrescaler = div;
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QSPIHandle.Init.FifoThreshold = 32;
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QSPIHandle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
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QSPIHandle.Init.FlashSize = QSPI_FLASH_SIZE;
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QSPIHandle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_3_CYCLE;
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QSPIHandle.Init.ClockMode = QSPI_CLOCK_MODE_0;
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QSPIHandle.Init.FlashID = QSPI_FLASH_ID_1;
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QSPIHandle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
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/* Initialize QuadSPI ------------------------------------------------ */
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HAL_QSPI_DeInit(&QSPIHandle);
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if (HAL_QSPI_Init(&QSPIHandle) != HAL_OK) {
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printf("%s: function %s, line %d, qspi init failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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while (1);
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} else {
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printf("qspi init succeed.\r\n");
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}
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}
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void qspi_flash_deinit(void)
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{
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/*##-1- Disable the NVIC for QSPI ###########################################*/
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HAL_NVIC_DisableIRQ(QUADSPI_IRQn);
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/*##-1- Disable peripherals ################################################*/
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/* De-Configure QSPI pins */
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HAL_GPIO_DeInit(QSPI_CLK_GPIO_PORT, QSPI_CLK_PIN);
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HAL_GPIO_DeInit(QSPI_BK1_CS_GPIO_PORT, QSPI_BK1_CS_PIN);
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HAL_GPIO_DeInit(QSPI_BK1_D0_GPIO_PORT, QSPI_BK1_D0_PIN);
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HAL_GPIO_DeInit(QSPI_BK1_D1_GPIO_PORT, QSPI_BK1_D1_PIN);
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HAL_GPIO_DeInit(QSPI_BK1_D2_GPIO_PORT, QSPI_BK1_D2_PIN);
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HAL_GPIO_DeInit(QSPI_BK1_D3_GPIO_PORT, QSPI_BK1_D3_PIN);
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/*##-3- Reset peripherals ##################################################*/
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/* Reset the QuadSPI memory interface */
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QSPI_FORCE_RESET();
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QSPI_RELEASE_RESET();
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/* Disable the QuadSPI memory interface clock */
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QSPI_CLK_DISABLE();
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}
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uint32_t qspi_flash_write(uint32_t addr, uint8_t *data, uint32_t length)
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{
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uint32_t ret;
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QSPI_CommandTypeDef s_command;
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ret = QSPI_WriteEnable(&QSPIHandle);
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if (ret) {
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return ret;
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}
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/* Initialize the read volatile configuration register command */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = QUAD_IN_FAST_PROG_CMD;
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s_command.AddressMode = QSPI_ADDRESS_1_LINE;
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s_command.AddressSize = QSPI_ADDRESS_24_BITS;
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s_command.Address = addr;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_4_LINES;
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s_command.DummyCycles = 0;
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s_command.NbData = length;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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/* Configure the command */
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if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"QUAD_IN_FAST_PROG_CMD\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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/* Writing of the data */
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if (HAL_QSPI_Transmit(&QSPIHandle, data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"HAL_QSPI_Transmit\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((3 << 28) | s_command.Instruction);
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}
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ret = QSPI_WaitforBusyRelease(&QSPIHandle);
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if (ret) {
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printf("%s: function %s, line %d, command \"busy after write\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ret;
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}
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return 0;
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}
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uint32_t qspi_flash_read(uint32_t addr, uint8_t *data, uint32_t length)
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{
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QSPI_CommandTypeDef s_command;
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/* Initialize the read volatile configuration register command */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = QUAD_OUT_FAST_READ_CMD;
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s_command.AddressMode = QSPI_ADDRESS_1_LINE;
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s_command.AddressSize = QSPI_ADDRESS_24_BITS;
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s_command.Address = addr;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_4_LINES;
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s_command.DummyCycles = 8;
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s_command.NbData = length;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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/* Configure the command */
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if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"QUAD_OUT_FAST_READ_CMD\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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/* Reception of the data */
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if (HAL_QSPI_Receive(&QSPIHandle, data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"HAL_QSPI_Receive\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((3 << 28) | s_command.Instruction);
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}
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return 0;
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}
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uint32_t qspi_flash_erase_4kbytes(uint32_t addr)
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{
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uint32_t ret;
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QSPI_CommandTypeDef s_command;
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ret = QSPI_WriteEnable(&QSPIHandle);
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if (ret) {
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return ret;
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}
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/* Initialize the read volatile configuration register command */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = SECTOR_ERASE_CMD;
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s_command.AddressMode = QSPI_ADDRESS_1_LINE;
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s_command.AddressSize = QSPI_ADDRESS_24_BITS;
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s_command.Address = addr;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_NONE;
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s_command.DummyCycles = 0;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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/* Configure the command */
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if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"SECTOR_ERASE_CMD\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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ret = QSPI_WaitforBusyRelease(&QSPIHandle);
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if (ret) {
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printf("%s: function %s, line %d, command \"busy after erasen 4K\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ret;
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}
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return 0;
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}
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uint32_t qspi_flash_erase_32kbytes(uint32_t addr)
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{
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uint32_t ret;
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QSPI_CommandTypeDef s_command;
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ret = QSPI_WriteEnable(&QSPIHandle);
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if (ret) {
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return ret;
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}
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/* Initialize the read volatile configuration register command */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = SUBBLOCK_ERASE_CMD;
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s_command.AddressMode = QSPI_ADDRESS_1_LINE;
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s_command.AddressSize = QSPI_ADDRESS_24_BITS;
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s_command.Address = addr;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_NONE;
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s_command.DummyCycles = 0;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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/* Configure the command */
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if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"SUBBLOCK_ERASE_CMD\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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ret = QSPI_WaitforBusyRelease(&QSPIHandle);
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if (ret) {
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printf("%s: function %s, line %d, command \"busy after erasen 32K\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ret;
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}
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return 0;
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}
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uint32_t qspi_flash_erase_64kbytes(uint32_t addr)
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{
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uint32_t ret;
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QSPI_CommandTypeDef s_command;
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ret = QSPI_WriteEnable(&QSPIHandle);
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if (ret) {
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return ret;
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}
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/* Initialize the read volatile configuration register command */
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s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
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s_command.Instruction = BLOCK_ERASE_CMD;
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s_command.AddressMode = QSPI_ADDRESS_1_LINE;
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s_command.AddressSize = QSPI_ADDRESS_24_BITS;
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s_command.Address = addr;
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s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
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s_command.DataMode = QSPI_DATA_NONE;
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s_command.DummyCycles = 0;
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s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
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s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
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s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
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/* Configure the command */
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if (HAL_QSPI_Command(&QSPIHandle, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
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printf("%s: function %s, line %d, command \"SUBBLOCK_ERASE_CMD\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ((1 << 28) | s_command.Instruction);
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}
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ret = QSPI_WaitforBusyRelease(&QSPIHandle);
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if (ret) {
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printf("%s: function %s, line %d, command \"busy after erasen 64K\" failed.\r\n", __FILE__, __FUNCTION__, __LINE__);
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return ret;
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}
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return 0;
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}
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